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END-INFO-DIR-ENTRY This file documents the internals of the GNU compilers. Copyright © 1988-2024 Free Software Foundation, Inc. Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.3 or any later version published by the Free Software Foundation; with the Invariant Sections being "Funding Free Software", the Front-Cover Texts being (a) (see below), and with the Back-Cover Texts being (b) (see below). A copy of the license is included in the section entitled "GNU Free Documentation License". (a) The FSF's Front-Cover Text is: A GNU Manual (b) The FSF's Back-Cover Text is: You have freedom to copy and modify this GNU Manual, like GNU software. Copies published by the Free Software Foundation raise funds for GNU development.  File: gccint.info, Node: Type Layout, Next: Registers, Prev: Storage Layout, Up: Target Macros 18.6 Layout of Source Language Data Types ========================================= These macros define the sizes and other characteristics of the standard basic data types used in programs being compiled. Unlike the macros in the previous section, these apply to specific features of C and related languages, rather than to fundamental aspects of storage layout. -- Macro: INT_TYPE_SIZE A C expression for the size in bits of the type ‘int’ on the target machine. If you don't define this, the default is one word. -- Macro: SHORT_TYPE_SIZE A C expression for the size in bits of the type ‘short’ on the target machine. If you don't define this, the default is half a word. (If this would be less than one storage unit, it is rounded up to one unit.) -- Macro: LONG_TYPE_SIZE A C expression for the size in bits of the type ‘long’ on the target machine. If you don't define this, the default is one word. -- Macro: ADA_LONG_TYPE_SIZE On some machines, the size used for the Ada equivalent of the type ‘long’ by a native Ada compiler differs from that used by C. In that situation, define this macro to be a C expression to be used for the size of that type. If you don't define this, the default is the value of ‘LONG_TYPE_SIZE’. -- Macro: LONG_LONG_TYPE_SIZE A C expression for the size in bits of the type ‘long long’ on the target machine. If you don't define this, the default is two words. If you want to support GNU Ada on your machine, the value of this macro must be at least 64. -- Macro: CHAR_TYPE_SIZE A C expression for the size in bits of the type ‘char’ on the target machine. If you don't define this, the default is ‘BITS_PER_UNIT’. -- Macro: BOOL_TYPE_SIZE A C expression for the size in bits of the C++ type ‘bool’ and C99 type ‘_Bool’ on the target machine. If you don't define this, and you probably shouldn't, the default is ‘CHAR_TYPE_SIZE’. -- Macro: FLOAT_TYPE_SIZE A C expression for the size in bits of the type ‘float’ on the target machine. If you don't define this, the default is one word. -- Macro: DOUBLE_TYPE_SIZE A C expression for the size in bits of the type ‘double’ on the target machine. If you don't define this, the default is two words. -- Macro: LONG_DOUBLE_TYPE_SIZE A C expression for the size in bits of the type ‘long double’ on the target machine. If you don't define this, the default is two words. -- Macro: SHORT_FRACT_TYPE_SIZE A C expression for the size in bits of the type ‘short _Fract’ on the target machine. If you don't define this, the default is ‘BITS_PER_UNIT’. -- Macro: FRACT_TYPE_SIZE A C expression for the size in bits of the type ‘_Fract’ on the target machine. If you don't define this, the default is ‘BITS_PER_UNIT * 2’. -- Macro: LONG_FRACT_TYPE_SIZE A C expression for the size in bits of the type ‘long _Fract’ on the target machine. If you don't define this, the default is ‘BITS_PER_UNIT * 4’. -- Macro: LONG_LONG_FRACT_TYPE_SIZE A C expression for the size in bits of the type ‘long long _Fract’ on the target machine. If you don't define this, the default is ‘BITS_PER_UNIT * 8’. -- Macro: SHORT_ACCUM_TYPE_SIZE A C expression for the size in bits of the type ‘short _Accum’ on the target machine. If you don't define this, the default is ‘BITS_PER_UNIT * 2’. -- Macro: ACCUM_TYPE_SIZE A C expression for the size in bits of the type ‘_Accum’ on the target machine. If you don't define this, the default is ‘BITS_PER_UNIT * 4’. -- Macro: LONG_ACCUM_TYPE_SIZE A C expression for the size in bits of the type ‘long _Accum’ on the target machine. If you don't define this, the default is ‘BITS_PER_UNIT * 8’. -- Macro: LONG_LONG_ACCUM_TYPE_SIZE A C expression for the size in bits of the type ‘long long _Accum’ on the target machine. If you don't define this, the default is ‘BITS_PER_UNIT * 16’. -- Macro: LIBGCC2_GNU_PREFIX This macro corresponds to the ‘TARGET_LIBFUNC_GNU_PREFIX’ target hook and should be defined if that hook is overriden to be true. It causes function names in libgcc to be changed to use a ‘__gnu_’ prefix for their name rather than the default ‘__’. A port which uses this macro should also arrange to use ‘t-gnu-prefix’ in the libgcc ‘config.host’. -- Macro: WIDEST_HARDWARE_FP_SIZE A C expression for the size in bits of the widest floating-point format supported by the hardware. If you define this macro, you must specify a value less than or equal to the value of ‘LONG_DOUBLE_TYPE_SIZE’. If you do not define this macro, the value of ‘LONG_DOUBLE_TYPE_SIZE’ is the default. -- Macro: DEFAULT_SIGNED_CHAR An expression whose value is 1 or 0, according to whether the type ‘char’ should be signed or unsigned by default. The user can always override this default with the options ‘-fsigned-char’ and ‘-funsigned-char’. -- Target Hook: bool TARGET_DEFAULT_SHORT_ENUMS (void) This target hook should return true if the compiler should give an ‘enum’ type only as many bytes as it takes to represent the range of possible values of that type. It should return false if all ‘enum’ types should be allocated like ‘int’. The default is to return false. -- Macro: SIZE_TYPE A C expression for a string describing the name of the data type to use for size values. The typedef name ‘size_t’ is defined using the contents of the string. The string can contain more than one keyword. If so, separate them with spaces, and write first any length keyword, then ‘unsigned’ if appropriate, and finally ‘int’. The string must exactly match one of the data type names defined in the function ‘c_common_nodes_and_builtins’ in the file ‘c-family/c-common.cc’. You may not omit ‘int’ or change the order--that would cause the compiler to crash on startup. If you don't define this macro, the default is ‘"long unsigned int"’. -- Macro: SIZETYPE GCC defines internal types (‘sizetype’, ‘ssizetype’, ‘bitsizetype’ and ‘sbitsizetype’) for expressions dealing with size. This macro is a C expression for a string describing the name of the data type from which the precision of ‘sizetype’ is extracted. The string has the same restrictions as ‘SIZE_TYPE’ string. If you don't define this macro, the default is ‘SIZE_TYPE’. -- Macro: PTRDIFF_TYPE A C expression for a string describing the name of the data type to use for the result of subtracting two pointers. The typedef name ‘ptrdiff_t’ is defined using the contents of the string. See ‘SIZE_TYPE’ above for more information. If you don't define this macro, the default is ‘"long int"’. -- Macro: WCHAR_TYPE A C expression for a string describing the name of the data type to use for wide characters. The typedef name ‘wchar_t’ is defined using the contents of the string. See ‘SIZE_TYPE’ above for more information. If you don't define this macro, the default is ‘"int"’. -- Macro: WCHAR_TYPE_SIZE A C expression for the size in bits of the data type for wide characters. This is used in ‘cpp’, which cannot make use of ‘WCHAR_TYPE’. -- Macro: WINT_TYPE A C expression for a string describing the name of the data type to use for wide characters passed to ‘printf’ and returned from ‘getwc’. The typedef name ‘wint_t’ is defined using the contents of the string. See ‘SIZE_TYPE’ above for more information. If you don't define this macro, the default is ‘"unsigned int"’. -- Macro: INTMAX_TYPE A C expression for a string describing the name of the data type that can represent any value of any standard or extended signed integer type. The typedef name ‘intmax_t’ is defined using the contents of the string. See ‘SIZE_TYPE’ above for more information. If you don't define this macro, the default is the first of ‘"int"’, ‘"long int"’, or ‘"long long int"’ that has as much precision as ‘long long int’. -- Macro: UINTMAX_TYPE A C expression for a string describing the name of the data type that can represent any value of any standard or extended unsigned integer type. The typedef name ‘uintmax_t’ is defined using the contents of the string. See ‘SIZE_TYPE’ above for more information. If you don't define this macro, the default is the first of ‘"unsigned int"’, ‘"long unsigned int"’, or ‘"long long unsigned int"’ that has as much precision as ‘long long unsigned int’. -- Macro: SIG_ATOMIC_TYPE -- Macro: INT8_TYPE -- Macro: INT16_TYPE -- Macro: INT32_TYPE -- Macro: INT64_TYPE -- Macro: UINT8_TYPE -- Macro: UINT16_TYPE -- Macro: UINT32_TYPE -- Macro: UINT64_TYPE -- Macro: INT_LEAST8_TYPE -- Macro: INT_LEAST16_TYPE -- Macro: INT_LEAST32_TYPE -- Macro: INT_LEAST64_TYPE -- Macro: UINT_LEAST8_TYPE -- Macro: UINT_LEAST16_TYPE -- Macro: UINT_LEAST32_TYPE -- Macro: UINT_LEAST64_TYPE -- Macro: INT_FAST8_TYPE -- Macro: INT_FAST16_TYPE -- Macro: INT_FAST32_TYPE -- Macro: INT_FAST64_TYPE -- Macro: UINT_FAST8_TYPE -- Macro: UINT_FAST16_TYPE -- Macro: UINT_FAST32_TYPE -- Macro: UINT_FAST64_TYPE -- Macro: INTPTR_TYPE -- Macro: UINTPTR_TYPE C expressions for the standard types ‘sig_atomic_t’, ‘int8_t’, ‘int16_t’, ‘int32_t’, ‘int64_t’, ‘uint8_t’, ‘uint16_t’, ‘uint32_t’, ‘uint64_t’, ‘int_least8_t’, ‘int_least16_t’, ‘int_least32_t’, ‘int_least64_t’, ‘uint_least8_t’, ‘uint_least16_t’, ‘uint_least32_t’, ‘uint_least64_t’, ‘int_fast8_t’, ‘int_fast16_t’, ‘int_fast32_t’, ‘int_fast64_t’, ‘uint_fast8_t’, ‘uint_fast16_t’, ‘uint_fast32_t’, ‘uint_fast64_t’, ‘intptr_t’, and ‘uintptr_t’. See ‘SIZE_TYPE’ above for more information. If any of these macros evaluates to a null pointer, the corresponding type is not supported; if GCC is configured to provide ‘’ in such a case, the header provided may not conform to C99, depending on the type in question. The defaults for all of these macros are null pointers. -- Macro: TARGET_PTRMEMFUNC_VBIT_LOCATION The C++ compiler represents a pointer-to-member-function with a struct that looks like: struct { union { void (*fn)(); ptrdiff_t vtable_index; }; ptrdiff_t delta; }; The C++ compiler must use one bit to indicate whether the function that will be called through a pointer-to-member-function is virtual. Normally, we assume that the low-order bit of a function pointer must always be zero. Then, by ensuring that the vtable_index is odd, we can distinguish which variant of the union is in use. But, on some platforms function pointers can be odd, and so this doesn't work. In that case, we use the low-order bit of the ‘delta’ field, and shift the remainder of the ‘delta’ field to the left. GCC will automatically make the right selection about where to store this bit using the ‘FUNCTION_BOUNDARY’ setting for your platform. However, some platforms such as ARM/Thumb have ‘FUNCTION_BOUNDARY’ set such that functions always start at even addresses, but the lowest bit of pointers to functions indicate whether the function at that address is in ARM or Thumb mode. If this is the case of your architecture, you should define this macro to ‘ptrmemfunc_vbit_in_delta’. In general, you should not have to define this macro. On architectures in which function addresses are always even, according to ‘FUNCTION_BOUNDARY’, GCC will automatically define this macro to ‘ptrmemfunc_vbit_in_pfn’. -- Macro: TARGET_VTABLE_USES_DESCRIPTORS Normally, the C++ compiler uses function pointers in vtables. This macro allows the target to change to use "function descriptors" instead. Function descriptors are found on targets for whom a function pointer is actually a small data structure. Normally the data structure consists of the actual code address plus a data pointer to which the function's data is relative. If vtables are used, the value of this macro should be the number of words that the function descriptor occupies. -- Macro: TARGET_VTABLE_ENTRY_ALIGN By default, the vtable entries are void pointers, the so the alignment is the same as pointer alignment. The value of this macro specifies the alignment of the vtable entry in bits. It should be defined only when special alignment is necessary. */ -- Macro: TARGET_VTABLE_DATA_ENTRY_DISTANCE There are a few non-descriptor entries in the vtable at offsets below zero. If these entries must be padded (say, to preserve the alignment specified by ‘TARGET_VTABLE_ENTRY_ALIGN’), set this to the number of words in each data entry.  File: gccint.info, Node: Registers, Next: Register Classes, Prev: Type Layout, Up: Target Macros 18.7 Register Usage =================== This section explains how to describe what registers the target machine has, and how (in general) they can be used. The description of which registers a specific instruction can use is done with register classes; see *note Register Classes::. For information on using registers to access a stack frame, see *note Frame Registers::. For passing values in registers, see *note Register Arguments::. For returning values in registers, see *note Scalar Return::. * Menu: * Register Basics:: Number and kinds of registers. * Allocation Order:: Order in which registers are allocated. * Values in Registers:: What kinds of values each reg can hold. * Leaf Functions:: Renumbering registers for leaf functions. * Stack Registers:: Handling a register stack such as 80387.  File: gccint.info, Node: Register Basics, Next: Allocation Order, Up: Registers 18.7.1 Basic Characteristics of Registers ----------------------------------------- Registers have various characteristics. -- Macro: FIRST_PSEUDO_REGISTER Number of hardware registers known to the compiler. They receive numbers 0 through ‘FIRST_PSEUDO_REGISTER-1’; thus, the first pseudo register's number really is assigned the number ‘FIRST_PSEUDO_REGISTER’. -- Macro: FIXED_REGISTERS An initializer that says which registers are used for fixed purposes all throughout the compiled code and are therefore not available for general allocation. These would include the stack pointer, the frame pointer (except on machines where that can be used as a general register when no frame pointer is needed), the program counter on machines where that is considered one of the addressable registers, and any other numbered register with a standard use. This information is expressed as a sequence of numbers, separated by commas and surrounded by braces. The Nth number is 1 if register N is fixed, 0 otherwise. The table initialized from this macro, and the table initialized by the following one, may be overridden at run time either automatically, by the actions of the macro ‘CONDITIONAL_REGISTER_USAGE’, or by the user with the command options ‘-ffixed-REG’, ‘-fcall-used-REG’ and ‘-fcall-saved-REG’. -- Macro: CALL_USED_REGISTERS Like ‘FIXED_REGISTERS’ but has 1 for each register that is clobbered (in general) by function calls as well as for fixed registers. This macro therefore identifies the registers that are not available for general allocation of values that must live across function calls. If a register has 0 in ‘CALL_USED_REGISTERS’, the compiler automatically saves it on function entry and restores it on function exit, if the register is used within the function. Exactly one of ‘CALL_USED_REGISTERS’ and ‘CALL_REALLY_USED_REGISTERS’ must be defined. Modern ports should define ‘CALL_REALLY_USED_REGISTERS’. -- Macro: CALL_REALLY_USED_REGISTERS Like ‘CALL_USED_REGISTERS’ except this macro doesn't require that the entire set of ‘FIXED_REGISTERS’ be included. (‘CALL_USED_REGISTERS’ must be a superset of ‘FIXED_REGISTERS’). Exactly one of ‘CALL_USED_REGISTERS’ and ‘CALL_REALLY_USED_REGISTERS’ must be defined. Modern ports should define ‘CALL_REALLY_USED_REGISTERS’. -- Target Hook: const predefined_function_abi & TARGET_FNTYPE_ABI (const_tree TYPE) Return the ABI used by a function with type TYPE; see the definition of ‘predefined_function_abi’ for details of the ABI descriptor. Targets only need to define this hook if they support interoperability between several ABIs in the same translation unit. -- Target Hook: const predefined_function_abi & TARGET_INSN_CALLEE_ABI (const rtx_insn *INSN) This hook returns a description of the ABI used by the target of call instruction INSN; see the definition of ‘predefined_function_abi’ for details of the ABI descriptor. Only the global function ‘insn_callee_abi’ should call this hook directly. Targets only need to define this hook if they support interoperability between several ABIs in the same translation unit. -- Target Hook: bool TARGET_HARD_REGNO_CALL_PART_CLOBBERED (unsigned int ABI_ID, unsigned int REGNO, machine_mode MODE) ABIs usually specify that calls must preserve the full contents of a particular register, or that calls can alter any part of a particular register. This information is captured by the target macro ‘CALL_REALLY_USED_REGISTERS’. However, some ABIs specify that calls must preserve certain bits of a particular register but can alter others. This hook should return true if this applies to at least one of the registers in ‘(reg:MODE REGNO)’, and if as a result the call would alter part of the MODE value. For example, if a call preserves the low 32 bits of a 64-bit hard register REGNO but can clobber the upper 32 bits, this hook should return true for a 64-bit mode but false for a 32-bit mode. The value of ABI_ID comes from the ‘predefined_function_abi’ structure that describes the ABI of the call; see the definition of the structure for more details. If (as is usual) the target uses the same ABI for all functions in a translation unit, ABI_ID is always 0. The default implementation returns false, which is correct for targets that don't have partly call-clobbered registers. -- Target Hook: const char * TARGET_GET_MULTILIB_ABI_NAME (void) This hook returns name of multilib ABI name. -- Target Hook: void TARGET_CONDITIONAL_REGISTER_USAGE (void) This hook may conditionally modify five variables ‘fixed_regs’, ‘call_used_regs’, ‘global_regs’, ‘reg_names’, and ‘reg_class_contents’, to take into account any dependence of these register sets on target flags. The first three of these are of type ‘char []’ (interpreted as boolean vectors). ‘global_regs’ is a ‘const char *[]’, and ‘reg_class_contents’ is a ‘HARD_REG_SET’. Before the macro is called, ‘fixed_regs’, ‘call_used_regs’, ‘reg_class_contents’, and ‘reg_names’ have been initialized from ‘FIXED_REGISTERS’, ‘CALL_USED_REGISTERS’, ‘REG_CLASS_CONTENTS’, and ‘REGISTER_NAMES’, respectively. ‘global_regs’ has been cleared, and any ‘-ffixed-REG’, ‘-fcall-used-REG’ and ‘-fcall-saved-REG’ command options have been applied. If the usage of an entire class of registers depends on the target flags, you may indicate this to GCC by using this macro to modify ‘fixed_regs’ and ‘call_used_regs’ to 1 for each of the registers in the classes which should not be used by GCC. Also make ‘define_register_constraint’s return ‘NO_REGS’ for constraints that shouldn't be used. (However, if this class is not included in ‘GENERAL_REGS’ and all of the insn patterns whose constraints permit this class are controlled by target switches, then GCC will automatically avoid using these registers when the target switches are opposed to them.) -- Macro: INCOMING_REGNO (OUT) Define this macro if the target machine has register windows. This C expression returns the register number as seen by the called function corresponding to the register number OUT as seen by the calling function. Return OUT if register number OUT is not an outbound register. -- Macro: OUTGOING_REGNO (IN) Define this macro if the target machine has register windows. This C expression returns the register number as seen by the calling function corresponding to the register number IN as seen by the called function. Return IN if register number IN is not an inbound register. -- Macro: LOCAL_REGNO (REGNO) Define this macro if the target machine has register windows. This C expression returns true if the register is call-saved but is in the register window. Unlike most call-saved registers, such registers need not be explicitly restored on function exit or during non-local gotos. -- Macro: PC_REGNUM If the program counter has a register number, define this as that register number. Otherwise, do not define it.  File: gccint.info, Node: Allocation Order, Next: Values in Registers, Prev: Register Basics, Up: Registers 18.7.2 Order of Allocation of Registers --------------------------------------- Registers are allocated in order. -- Macro: REG_ALLOC_ORDER If defined, an initializer for a vector of integers, containing the numbers of hard registers in the order in which GCC should prefer to use them (from most preferred to least). If this macro is not defined, registers are used lowest numbered first (all else being equal). One use of this macro is on machines where the highest numbered registers must always be saved and the save-multiple-registers instruction supports only sequences of consecutive registers. On such machines, define ‘REG_ALLOC_ORDER’ to be an initializer that lists the highest numbered allocable register first. -- Macro: ADJUST_REG_ALLOC_ORDER A C statement (sans semicolon) to choose the order in which to allocate hard registers for pseudo-registers local to a basic block. Store the desired register order in the array ‘reg_alloc_order’. Element 0 should be the register to allocate first; element 1, the next register; and so on. The macro body should not assume anything about the contents of ‘reg_alloc_order’ before execution of the macro. On most machines, it is not necessary to define this macro. -- Macro: HONOR_REG_ALLOC_ORDER Normally, IRA tries to estimate the costs for saving a register in the prologue and restoring it in the epilogue. This discourages it from using call-saved registers. If a machine wants to ensure that IRA allocates registers in the order given by REG_ALLOC_ORDER even if some call-saved registers appear earlier than call-used ones, then define this macro as a C expression to nonzero. Default is 0. -- Macro: IRA_HARD_REGNO_ADD_COST_MULTIPLIER (REGNO) In some case register allocation order is not enough for the Integrated Register Allocator (IRA) to generate a good code. If this macro is defined, it should return a floating point value based on REGNO. The cost of using REGNO for a pseudo will be increased by approximately the pseudo's usage frequency times the value returned by this macro. Not defining this macro is equivalent to having it always return ‘0.0’. On most machines, it is not necessary to define this macro.  File: gccint.info, Node: Values in Registers, Next: Leaf Functions, Prev: Allocation Order, Up: Registers 18.7.3 How Values Fit in Registers ---------------------------------- This section discusses the macros that describe which kinds of values (specifically, which machine modes) each register can hold, and how many consecutive registers are needed for a given mode. -- Target Hook: unsigned int TARGET_HARD_REGNO_NREGS (unsigned int REGNO, machine_mode MODE) This hook returns the number of consecutive hard registers, starting at register number REGNO, required to hold a value of mode MODE. This hook must never return zero, even if a register cannot hold the requested mode - indicate that with ‘TARGET_HARD_REGNO_MODE_OK’ and/or ‘TARGET_CAN_CHANGE_MODE_CLASS’ instead. The default definition returns the number of words in MODE. -- Macro: HARD_REGNO_NREGS_HAS_PADDING (REGNO, MODE) A C expression that is nonzero if a value of mode MODE, stored in memory, ends with padding that causes it to take up more space than in registers starting at register number REGNO (as determined by multiplying GCC's notion of the size of the register when containing this mode by the number of registers returned by ‘TARGET_HARD_REGNO_NREGS’). By default this is zero. For example, if a floating-point value is stored in three 32-bit registers but takes up 128 bits in memory, then this would be nonzero. This macros only needs to be defined if there are cases where ‘subreg_get_info’ would otherwise wrongly determine that a ‘subreg’ can be represented by an offset to the register number, when in fact such a ‘subreg’ would contain some of the padding not stored in registers and so not be representable. -- Macro: HARD_REGNO_NREGS_WITH_PADDING (REGNO, MODE) For values of REGNO and MODE for which ‘HARD_REGNO_NREGS_HAS_PADDING’ returns nonzero, a C expression returning the greater number of registers required to hold the value including any padding. In the example above, the value would be four. -- Macro: REGMODE_NATURAL_SIZE (MODE) Define this macro if the natural size of registers that hold values of mode MODE is not the word size. It is a C expression that should give the natural size in bytes for the specified mode. It is used by the register allocator to try to optimize its results. This happens for example on SPARC 64-bit where the natural size of floating-point registers is still 32-bit. -- Target Hook: bool TARGET_HARD_REGNO_MODE_OK (unsigned int REGNO, machine_mode MODE) This hook returns true if it is permissible to store a value of mode MODE in hard register number REGNO (or in several registers starting with that one). The default definition returns true unconditionally. You need not include code to check for the numbers of fixed registers, because the allocation mechanism considers them to be always occupied. On some machines, double-precision values must be kept in even/odd register pairs. You can implement that by defining this hook to reject odd register numbers for such modes. The minimum requirement for a mode to be OK in a register is that the ‘movMODE’ instruction pattern support moves between the register and other hard register in the same class and that moving a value into the register and back out not alter it. Since the same instruction used to move ‘word_mode’ will work for all narrower integer modes, it is not necessary on any machine for this hook to distinguish between these modes, provided you define patterns ‘movhi’, etc., to take advantage of this. This is useful because of the interaction between ‘TARGET_HARD_REGNO_MODE_OK’ and ‘TARGET_MODES_TIEABLE_P’; it is very desirable for all integer modes to be tieable. Many machines have special registers for floating point arithmetic. Often people assume that floating point machine modes are allowed only in floating point registers. This is not true. Any registers that can hold integers can safely _hold_ a floating point machine mode, whether or not floating arithmetic can be done on it in those registers. Integer move instructions can be used to move the values. On some machines, though, the converse is true: fixed-point machine modes may not go in floating registers. This is true if the floating registers normalize any value stored in them, because storing a non-floating value there would garble it. In this case, ‘TARGET_HARD_REGNO_MODE_OK’ should reject fixed-point machine modes in floating registers. But if the floating registers do not automatically normalize, if you can store any bit pattern in one and retrieve it unchanged without a trap, then any machine mode may go in a floating register, so you can define this hook to say so. The primary significance of special floating registers is rather that they are the registers acceptable in floating point arithmetic instructions. However, this is of no concern to ‘TARGET_HARD_REGNO_MODE_OK’. You handle it by writing the proper constraints for those instructions. On some machines, the floating registers are especially slow to access, so that it is better to store a value in a stack frame than in such a register if floating point arithmetic is not being done. As long as the floating registers are not in class ‘GENERAL_REGS’, they will not be used unless some pattern's constraint asks for one. -- Macro: HARD_REGNO_RENAME_OK (FROM, TO) A C expression that is nonzero if it is OK to rename a hard register FROM to another hard register TO. One common use of this macro is to prevent renaming of a register to another register that is not saved by a prologue in an interrupt handler. The default is always nonzero. -- Target Hook: bool TARGET_MODES_TIEABLE_P (machine_mode MODE1, machine_mode MODE2) This hook returns true if a value of mode MODE1 is accessible in mode MODE2 without copying. If ‘TARGET_HARD_REGNO_MODE_OK (R, MODE1)’ and ‘TARGET_HARD_REGNO_MODE_OK (R, MODE2)’ are always the same for any R, then ‘TARGET_MODES_TIEABLE_P (MODE1, MODE2)’ should be true. If they differ for any R, you should define this hook to return false unless some other mechanism ensures the accessibility of the value in a narrower mode. You should define this hook to return true in as many cases as possible since doing so will allow GCC to perform better register allocation. The default definition returns true unconditionally. -- Target Hook: bool TARGET_HARD_REGNO_SCRATCH_OK (unsigned int REGNO) This target hook should return ‘true’ if it is OK to use a hard register REGNO as scratch reg in peephole2. One common use of this macro is to prevent using of a register that is not saved by a prologue in an interrupt handler. The default version of this hook always returns ‘true’. -- Macro: AVOID_CCMODE_COPIES Define this macro if the compiler should avoid copies to/from ‘CCmode’ registers. You should only define this macro if support for copying to/from ‘CCmode’ is incomplete.  File: gccint.info, Node: Leaf Functions, Next: Stack Registers, Prev: Values in Registers, Up: Registers 18.7.4 Handling Leaf Functions ------------------------------ On some machines, a leaf function (i.e., one which makes no calls) can run more efficiently if it does not make its own register window. Often this means it is required to receive its arguments in the registers where they are passed by the caller, instead of the registers where they would normally arrive. The special treatment for leaf functions generally applies only when other conditions are met; for example, often they may use only those registers for its own variables and temporaries. We use the term "leaf function" to mean a function that is suitable for this special handling, so that functions with no calls are not necessarily "leaf functions". GCC assigns register numbers before it knows whether the function is suitable for leaf function treatment. So it needs to renumber the registers in order to output a leaf function. The following macros accomplish this. -- Macro: LEAF_REGISTERS Name of a char vector, indexed by hard register number, which contains 1 for a register that is allowable in a candidate for leaf function treatment. If leaf function treatment involves renumbering the registers, then the registers marked here should be the ones before renumbering--those that GCC would ordinarily allocate. The registers which will actually be used in the assembler code, after renumbering, should not be marked with 1 in this vector. Define this macro only if the target machine offers a way to optimize the treatment of leaf functions. -- Macro: LEAF_REG_REMAP (REGNO) A C expression whose value is the register number to which REGNO should be renumbered, when a function is treated as a leaf function. If REGNO is a register number which should not appear in a leaf function before renumbering, then the expression should yield −1, which will cause the compiler to abort. Define this macro only if the target machine offers a way to optimize the treatment of leaf functions, and registers need to be renumbered to do this. ‘TARGET_ASM_FUNCTION_PROLOGUE’ and ‘TARGET_ASM_FUNCTION_EPILOGUE’ must usually treat leaf functions specially. They can test the C variable ‘current_function_is_leaf’ which is nonzero for leaf functions. ‘current_function_is_leaf’ is set prior to local register allocation and is valid for the remaining compiler passes. They can also test the C variable ‘current_function_uses_only_leaf_regs’ which is nonzero for leaf functions which only use leaf registers. ‘current_function_uses_only_leaf_regs’ is valid after all passes that modify the instructions have been run and is only useful if ‘LEAF_REGISTERS’ is defined.  File: gccint.info, Node: Stack Registers, Prev: Leaf Functions, Up: Registers 18.7.5 Registers That Form a Stack ---------------------------------- There are special features to handle computers where some of the "registers" form a stack. Stack registers are normally written by pushing onto the stack, and are numbered relative to the top of the stack. Currently, GCC can only handle one group of stack-like registers, and they must be consecutively numbered. Furthermore, the existing support for stack-like registers is specific to the 80387 floating point coprocessor. If you have a new architecture that uses stack-like registers, you will need to do substantial work on ‘reg-stack.cc’ and write your machine description to cooperate with it, as well as defining these macros. -- Macro: STACK_REGS Define this if the machine has any stack-like registers. -- Macro: STACK_REG_COVER_CLASS This is a cover class containing the stack registers. Define this if the machine has any stack-like registers. -- Macro: FIRST_STACK_REG The number of the first stack-like register. This one is the top of the stack. -- Macro: LAST_STACK_REG The number of the last stack-like register. This one is the bottom of the stack.  File: gccint.info, Node: Register Classes, Next: Stack and Calling, Prev: Registers, Up: Target Macros 18.8 Register Classes ===================== On many machines, the numbered registers are not all equivalent. For example, certain registers may not be allowed for indexed addressing; certain registers may not be allowed in some instructions. These machine restrictions are described to the compiler using “register classes”. You define a number of register classes, giving each one a name and saying which of the registers belong to it. Then you can specify register classes that are allowed as operands to particular instruction patterns. In general, each register will belong to several classes. In fact, one class must be named ‘ALL_REGS’ and contain all the registers. Another class must be named ‘NO_REGS’ and contain no registers. Often the union of two classes will be another class; however, this is not required. One of the classes must be named ‘GENERAL_REGS’. There is nothing terribly special about the name, but the operand constraint letters ‘r’ and ‘g’ specify this class. If ‘GENERAL_REGS’ is the same as ‘ALL_REGS’, just define it as a macro which expands to ‘ALL_REGS’. Order the classes so that if class X is contained in class Y then X has a lower class number than Y. The way classes other than ‘GENERAL_REGS’ are specified in operand constraints is through machine-dependent operand constraint letters. You can define such letters to correspond to various classes, then use them in operand constraints. You must define the narrowest register classes for allocatable registers, so that each class either has no subclasses, or that for some mode, the move cost between registers within the class is cheaper than moving a register in the class to or from memory (*note Costs::). You should define a class for the union of two classes whenever some instruction allows both classes. For example, if an instruction allows either a floating point (coprocessor) register or a general register for a certain operand, you should define a class ‘FLOAT_OR_GENERAL_REGS’ which includes both of them. Otherwise you will get suboptimal code, or even internal compiler errors when reload cannot find a register in the class computed via ‘reg_class_subunion’. You must also specify certain redundant information about the register classes: for each class, which classes contain it and which ones are contained in it; for each pair of classes, the largest class contained in their union. When a value occupying several consecutive registers is expected in a certain class, all the registers used must belong to that class. Therefore, register classes cannot be used to enforce a requirement for a register pair to start with an even-numbered register. The way to specify this requirement is with ‘TARGET_HARD_REGNO_MODE_OK’, or with a filter expression in a ‘define_register_constraint’. Register classes used for input-operands of bitwise-and or shift instructions have a special requirement: each such class must have, for each fixed-point machine mode, a subclass whose registers can transfer that mode to or from memory. For example, on some machines, the operations for single-byte values (‘QImode’) are limited to certain registers. When this is so, each register class that is used in a bitwise-and or shift instruction must have a subclass consisting of registers from which single-byte values can be loaded or stored. This is so that ‘PREFERRED_RELOAD_CLASS’ can always have a possible value to return. -- Data type: enum reg_class An enumerated type that must be defined with all the register class names as enumerated values. ‘NO_REGS’ must be first. ‘ALL_REGS’ must be the last register class, followed by one more enumerated value, ‘LIM_REG_CLASSES’, which is not a register class but rather tells how many classes there are. Each register class has a number, which is the value of casting the class name to type ‘int’. The number serves as an index in many of the tables described below. -- Macro: N_REG_CLASSES The number of distinct register classes, defined as follows: #define N_REG_CLASSES (int) LIM_REG_CLASSES -- Macro: REG_CLASS_NAMES An initializer containing the names of the register classes as C string constants. These names are used in writing some of the debugging dumps. -- Macro: REG_CLASS_CONTENTS An initializer containing the contents of the register classes, as integers which are bit masks. The Nth integer specifies the contents of class N. The way the integer MASK is interpreted is that register R is in the class if ‘MASK & (1 << R)’ is 1. When the machine has more than 32 registers, an integer does not suffice. Then the integers are replaced by sub-initializers, braced groupings containing several integers. Each sub-initializer must be suitable as an initializer for the type ‘HARD_REG_SET’ which is defined in ‘hard-reg-set.h’. In this situation, the first integer in each sub-initializer corresponds to registers 0 through 31, the second integer to registers 32 through 63, and so on. -- Macro: REGNO_REG_CLASS (REGNO) A C expression whose value is a register class containing hard register REGNO. In general there is more than one such class; choose a class which is “minimal”, meaning that no smaller class also contains the register. -- Macro: BASE_REG_CLASS A macro whose definition is the name of the class to which a valid base register must belong. A base register is one used in an address which is the register value plus a displacement. -- Macro: MODE_BASE_REG_CLASS (MODE) This is a variation of the ‘BASE_REG_CLASS’ macro which allows the selection of a base register in a mode dependent manner. If MODE is VOIDmode then it should return the same value as ‘BASE_REG_CLASS’. -- Macro: MODE_BASE_REG_REG_CLASS (MODE) A C expression whose value is the register class to which a valid base register must belong in order to be used in a base plus index register address. You should define this macro if base plus index addresses have different requirements than other base register uses. -- Macro: MODE_CODE_BASE_REG_CLASS (MODE, ADDRESS_SPACE, OUTER_CODE, INDEX_CODE) A C expression whose value is the register class to which a valid base register for a memory reference in mode MODE to address space ADDRESS_SPACE must belong. OUTER_CODE and INDEX_CODE define the context in which the base register occurs. OUTER_CODE is the code of the immediately enclosing expression (‘MEM’ for the top level of an address, ‘ADDRESS’ for something that occurs in an ‘address_operand’). INDEX_CODE is the code of the corresponding index expression if OUTER_CODE is ‘PLUS’; ‘SCRATCH’ otherwise. -- Macro: INSN_BASE_REG_CLASS (INSN) A C expression whose value is the register class to which a valid base register for a specified INSN must belong. This macro is used when some backend insns may have limited usage of base register compared with other insns. If you define this macro, the compiler will use it instead of all other defined macros that relate to BASE_REG_CLASS. -- Macro: INDEX_REG_CLASS A macro whose definition is the name of the class to which a valid index register must belong. An index register is one used in an address where its value is either multiplied by a scale factor or added to another register (as well as added to a displacement). -- Macro: INSN_INDEX_REG_CLASS (INSN) A C expression whose value is the register class to which a valid index register for a specified INSN must belong. This macro is used when some backend insns may have limited usage of index register compared with other insns. If you defined this macro, the compiler will use it instead of ‘INDEX_REG_CLASS’. -- Macro: REGNO_OK_FOR_BASE_P (NUM) A C expression which is nonzero if register number NUM is suitable for use as a base register in operand addresses. -- Macro: REGNO_MODE_OK_FOR_BASE_P (NUM, MODE) A C expression that is just like ‘REGNO_OK_FOR_BASE_P’, except that that expression may examine the mode of the memory reference in MODE. You should define this macro if the mode of the memory reference affects whether a register may be used as a base register. If you define this macro, the compiler will use it instead of ‘REGNO_OK_FOR_BASE_P’. The mode may be ‘VOIDmode’ for addresses that appear outside a ‘MEM’, i.e., as an ‘address_operand’. -- Macro: REGNO_MODE_OK_FOR_REG_BASE_P (NUM, MODE) A C expression which is nonzero if register number NUM is suitable for use as a base register in base plus index operand addresses, accessing memory in mode MODE. It may be either a suitable hard register or a pseudo register that has been allocated such a hard register. You should define this macro if base plus index addresses have different requirements than other base register uses. Use of this macro is deprecated; please use the more general ‘REGNO_MODE_CODE_OK_FOR_BASE_P’. -- Macro: REGNO_MODE_CODE_OK_FOR_BASE_P (NUM, MODE, ADDRESS_SPACE, OUTER_CODE, INDEX_CODE) A C expression which is nonzero if register number NUM is suitable for use as a base register in operand addresses, accessing memory in mode MODE in address space ADDRESS_SPACE. This is similar to ‘REGNO_MODE_OK_FOR_BASE_P’, except that that expression may examine the context in which the register appears in the memory reference. OUTER_CODE is the code of the immediately enclosing expression (‘MEM’ if at the top level of the address, ‘ADDRESS’ for something that occurs in an ‘address_operand’). INDEX_CODE is the code of the corresponding index expression if OUTER_CODE is ‘PLUS’; ‘SCRATCH’ otherwise. The mode may be ‘VOIDmode’ for addresses that appear outside a ‘MEM’, i.e., as an ‘address_operand’. -- Macro: REGNO_OK_FOR_INSN_BASE_P (NUM, INSN) A C expression which is nonzero if register number NUM is suitable for use as a base register in operand addresses for a specified INSN. This macro is used when some backend insn may have limited usage of base register compared with other insns. If you define this macro, the compiler will use it instead of all other defined macros that relate to REGNO_OK_FOR_BASE_P. -- Macro: REGNO_OK_FOR_INDEX_P (NUM) A C expression which is nonzero if register number NUM is suitable for use as an index register in operand addresses. It may be either a suitable hard register or a pseudo register that has been allocated such a hard register. The difference between an index register and a base register is that the index register may be scaled. If an address involves the sum of two registers, neither one of them scaled, then either one may be labeled the "base" and the other the "index"; but whichever labeling is used must fit the machine's constraints of which registers may serve in each capacity. The compiler will try both labelings, looking for one that is valid, and will reload one or both registers only if neither labeling works. -- Target Hook: reg_class_t TARGET_PREFERRED_RENAME_CLASS (reg_class_t RCLASS) A target hook that places additional preference on the register class to use when it is necessary to rename a register in class RCLASS to another class, or perhaps NO_REGS, if no preferred register class is found or hook ‘preferred_rename_class’ is not implemented. Sometimes returning a more restrictive class makes better code. For example, on ARM, thumb-2 instructions using ‘LO_REGS’ may be smaller than instructions using ‘GENERIC_REGS’. By returning ‘LO_REGS’ from ‘preferred_rename_class’, code size can be reduced. -- Target Hook: reg_class_t TARGET_PREFERRED_RELOAD_CLASS (rtx X, reg_class_t RCLASS) A target hook that places additional restrictions on the register class to use when it is necessary to copy value X into a register in class RCLASS. The value is a register class; perhaps RCLASS, or perhaps another, smaller class. The default version of this hook always returns value of ‘rclass’ argument. Sometimes returning a more restrictive class makes better code. For example, on the 68000, when X is an integer constant that is in range for a ‘moveq’ instruction, the value of this macro is always ‘DATA_REGS’ as long as RCLASS includes the data registers. Requiring a data register guarantees that a ‘moveq’ will be used. One case where ‘TARGET_PREFERRED_RELOAD_CLASS’ must not return RCLASS is if X is a legitimate constant which cannot be loaded into some register class. By returning ‘NO_REGS’ you can force X into a memory location. For example, rs6000 can load immediate values into general-purpose registers, but does not have an instruction for loading an immediate value into a floating-point register, so ‘TARGET_PREFERRED_RELOAD_CLASS’ returns ‘NO_REGS’ when X is a floating-point constant. If the constant can't be loaded into any kind of register, code generation will be better if ‘TARGET_LEGITIMATE_CONSTANT_P’ makes the constant illegitimate instead of using ‘TARGET_PREFERRED_RELOAD_CLASS’. If an insn has pseudos in it after register allocation, reload will go through the alternatives and call repeatedly ‘TARGET_PREFERRED_RELOAD_CLASS’ to find the best one. Returning ‘NO_REGS’, in this case, makes reload add a ‘!’ in front of the constraint: the x86 back-end uses this feature to discourage usage of 387 registers when math is done in the SSE registers (and vice versa). -- Macro: PREFERRED_RELOAD_CLASS (X, CLASS) A C expression that places additional restrictions on the register class to use when it is necessary to copy value X into a register in class CLASS. The value is a register class; perhaps CLASS, or perhaps another, smaller class. On many machines, the following definition is safe: #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS Sometimes returning a more restrictive class makes better code. For example, on the 68000, when X is an integer constant that is in range for a ‘moveq’ instruction, the value of this macro is always ‘DATA_REGS’ as long as CLASS includes the data registers. Requiring a data register guarantees that a ‘moveq’ will be used. One case where ‘PREFERRED_RELOAD_CLASS’ must not return CLASS is if X is a legitimate constant which cannot be loaded into some register class. By returning ‘NO_REGS’ you can force X into a memory location. For example, rs6000 can load immediate values into general-purpose registers, but does not have an instruction for loading an immediate value into a floating-point register, so ‘PREFERRED_RELOAD_CLASS’ returns ‘NO_REGS’ when X is a floating-point constant. If the constant cannot be loaded into any kind of register, code generation will be better if ‘TARGET_LEGITIMATE_CONSTANT_P’ makes the constant illegitimate instead of using ‘TARGET_PREFERRED_RELOAD_CLASS’. If an insn has pseudos in it after register allocation, reload will go through the alternatives and call repeatedly ‘PREFERRED_RELOAD_CLASS’ to find the best one. Returning ‘NO_REGS’, in this case, makes reload add a ‘!’ in front of the constraint: the x86 back-end uses this feature to discourage usage of 387 registers when math is done in the SSE registers (and vice versa). -- Target Hook: reg_class_t TARGET_PREFERRED_OUTPUT_RELOAD_CLASS (rtx X, reg_class_t RCLASS) Like ‘TARGET_PREFERRED_RELOAD_CLASS’, but for output reloads instead of input reloads. The default version of this hook always returns value of ‘rclass’ argument. You can also use ‘TARGET_PREFERRED_OUTPUT_RELOAD_CLASS’ to discourage reload from using some alternatives, like ‘TARGET_PREFERRED_RELOAD_CLASS’. -- Macro: LIMIT_RELOAD_CLASS (MODE, CLASS) A C expression that places additional restrictions on the register class to use when it is necessary to be able to hold a value of mode MODE in a reload register for which class CLASS would ordinarily be used. Unlike ‘PREFERRED_RELOAD_CLASS’, this macro should be used when there are certain modes that simply cannot go in certain reload classes. The value is a register class; perhaps CLASS, or perhaps another, smaller class. Don't define this macro unless the target machine has limitations which require the macro to do something nontrivial. -- Target Hook: reg_class_t TARGET_SECONDARY_RELOAD (bool IN_P, rtx X, reg_class_t RELOAD_CLASS, machine_mode RELOAD_MODE, secondary_reload_info *SRI) Many machines have some registers that cannot be copied directly to or from memory or even from other types of registers. An example is the ‘MQ’ register, which on most machines, can only be copied to or from general registers, but not memory. Below, we shall be using the term 'intermediate register' when a move operation cannot be performed directly, but has to be done by copying the source into the intermediate register first, and then copying the intermediate register to the destination. An intermediate register always has the same mode as source and destination. Since it holds the actual value being copied, reload might apply optimizations to re-use an intermediate register and eliding the copy from the source when it can determine that the intermediate register still holds the required value. Another kind of secondary reload is required on some machines which allow copying all registers to and from memory, but require a scratch register for stores to some memory locations (e.g., those with symbolic address on the RT, and those with certain symbolic address on the SPARC when compiling PIC). Scratch registers need not have the same mode as the value being copied, and usually hold a different value than that being copied. Special patterns in the md file are needed to describe how the copy is performed with the help of the scratch register; these patterns also describe the number, register class(es) and mode(s) of the scratch register(s). In some cases, both an intermediate and a scratch register are required. For input reloads, this target hook is called with nonzero IN_P, and X is an rtx that needs to be copied to a register of class RELOAD_CLASS in RELOAD_MODE. For output reloads, this target hook is called with zero IN_P, and a register of class RELOAD_CLASS needs to be copied to rtx X in RELOAD_MODE. If copying a register of RELOAD_CLASS from/to X requires an intermediate register, the hook ‘secondary_reload’ should return the register class required for this intermediate register. If no intermediate register is required, it should return NO_REGS. If more than one intermediate register is required, describe the one that is closest in the copy chain to the reload register. If scratch registers are needed, you also have to describe how to perform the copy from/to the reload register to/from this closest intermediate register. Or if no intermediate register is required, but still a scratch register is needed, describe the copy from/to the reload register to/from the reload operand X. You do this by setting ‘sri->icode’ to the instruction code of a pattern in the md file which performs the move. Operands 0 and 1 are the output and input of this copy, respectively. Operands from operand 2 onward are for scratch operands. These scratch operands must have a mode, and a single-register-class output constraint. When an intermediate register is used, the ‘secondary_reload’ hook will be called again to determine how to copy the intermediate register to/from the reload operand X, so your hook must also have code to handle the register class of the intermediate operand. X might be a pseudo-register or a ‘subreg’ of a pseudo-register, which could either be in a hard register or in memory. Use ‘true_regnum’ to find out; it will return −1 if the pseudo is in memory and the hard register number if it is in a register. Scratch operands in memory (constraint ‘"=m"’ / ‘"=&m"’) are currently not supported. For the time being, you will have to continue to use ‘TARGET_SECONDARY_MEMORY_NEEDED’ for that purpose. ‘copy_cost’ also uses this target hook to find out how values are copied. If you want it to include some extra cost for the need to allocate (a) scratch register(s), set ‘sri->extra_cost’ to the additional cost. Or if two dependent moves are supposed to have a lower cost than the sum of the individual moves due to expected fortuitous scheduling and/or special forwarding logic, you can set ‘sri->extra_cost’ to a negative amount. -- Macro: SECONDARY_RELOAD_CLASS (CLASS, MODE, X) -- Macro: SECONDARY_INPUT_RELOAD_CLASS (CLASS, MODE, X) -- Macro: SECONDARY_OUTPUT_RELOAD_CLASS (CLASS, MODE, X) These macros are obsolete, new ports should use the target hook ‘TARGET_SECONDARY_RELOAD’ instead. These are obsolete macros, replaced by the ‘TARGET_SECONDARY_RELOAD’ target hook. Older ports still define these macros to indicate to the reload phase that it may need to allocate at least one register for a reload in addition to the register to contain the data. Specifically, if copying X to a register CLASS in MODE requires an intermediate register, you were supposed to define ‘SECONDARY_INPUT_RELOAD_CLASS’ to return the largest register class all of whose registers can be used as intermediate registers or scratch registers. If copying a register CLASS in MODE to X requires an intermediate or scratch register, ‘SECONDARY_OUTPUT_RELOAD_CLASS’ was supposed to be defined to return the largest register class required. If the requirements for input and output reloads were the same, the macro ‘SECONDARY_RELOAD_CLASS’ should have been used instead of defining both macros identically. The values returned by these macros are often ‘GENERAL_REGS’. Return ‘NO_REGS’ if no spare register is needed; i.e., if X can be directly copied to or from a register of CLASS in MODE without requiring a scratch register. Do not define this macro if it would always return ‘NO_REGS’. If a scratch register is required (either with or without an intermediate register), you were supposed to define patterns for ‘reload_inM’ or ‘reload_outM’, as required (*note Standard Names::. These patterns, which were normally implemented with a ‘define_expand’, should be similar to the ‘movM’ patterns, except that operand 2 is the scratch register. These patterns need constraints for the reload register and scratch register that contain a single register class. If the original reload register (whose class is CLASS) can meet the constraint given in the pattern, the value returned by these macros is used for the class of the scratch register. Otherwise, two additional reload registers are required. Their classes are obtained from the constraints in the insn pattern. X might be a pseudo-register or a ‘subreg’ of a pseudo-register, which could either be in a hard register or in memory. Use ‘true_regnum’ to find out; it will return −1 if the pseudo is in memory and the hard register number if it is in a register. These macros should not be used in the case where a particular class of registers can only be copied to memory and not to another class of registers. In that case, secondary reload registers are not needed and would not be helpful. Instead, a stack location must be used to perform the copy and the ‘movM’ pattern should use memory as an intermediate storage. This case often occurs between floating-point and general registers. -- Target Hook: bool TARGET_SECONDARY_MEMORY_NEEDED (machine_mode MODE, reg_class_t CLASS1, reg_class_t CLASS2) Certain machines have the property that some registers cannot be copied to some other registers without using memory. Define this hook on those machines to return true if objects of mode M in registers of CLASS1 can only be copied to registers of class CLASS2 by storing a register of CLASS1 into memory and loading that memory location into a register of CLASS2. The default definition returns false for all inputs. -- Macro: SECONDARY_MEMORY_NEEDED_RTX (MODE) Normally when ‘TARGET_SECONDARY_MEMORY_NEEDED’ is defined, the compiler allocates a stack slot for a memory location needed for register copies. If this macro is defined, the compiler instead uses the memory location defined by this macro. Do not define this macro if you do not define ‘TARGET_SECONDARY_MEMORY_NEEDED’. -- Target Hook: machine_mode TARGET_SECONDARY_MEMORY_NEEDED_MODE (machine_mode MODE) If ‘TARGET_SECONDARY_MEMORY_NEEDED’ tells the compiler to use memory when moving between two particular registers of mode MODE, this hook specifies the mode that the memory should have. The default depends on ‘TARGET_LRA_P’. Without LRA, the default is to use a word-sized mode for integral modes that are smaller than a a word. This is right thing to do on most machines because it ensures that all bits of the register are copied and prevents accesses to the registers in a narrower mode, which some machines prohibit for floating-point registers. However, this default behavior is not correct on some machines, such as the DEC Alpha, that store short integers in floating-point registers differently than in integer registers. On those machines, the default widening will not work correctly and you must define this hook to suppress that widening in some cases. See the file ‘alpha.cc’ for details. With LRA, the default is to use MODE unmodified. -- Target Hook: void TARGET_SELECT_EARLY_REMAT_MODES (sbitmap MODES) On some targets, certain modes cannot be held in registers around a standard ABI call and are relatively expensive to spill to the stack. The early rematerialization pass can help in such cases by aggressively recomputing values after calls, so that they don't need to be spilled. This hook returns the set of such modes by setting the associated bits in MODES. The default implementation selects no modes, which has the effect of disabling the early rematerialization pass. -- Target Hook: bool TARGET_CLASS_LIKELY_SPILLED_P (reg_class_t RCLASS) A target hook which returns ‘true’ if pseudos that have been assigned to registers of class RCLASS would likely be spilled because registers of RCLASS are needed for spill registers. The default version of this target hook returns ‘true’ if RCLASS has exactly one register and ‘false’ otherwise. On most machines, this default should be used. For generally register-starved machines, such as i386, or machines with right register constraints, such as SH, this hook can be used to avoid excessive spilling. This hook is also used by some of the global intra-procedural code transformations to throtle code motion, to avoid increasing register pressure. -- Target Hook: unsigned char TARGET_CLASS_MAX_NREGS (reg_class_t RCLASS, machine_mode MODE) A target hook returns the maximum number of consecutive registers of class RCLASS needed to hold a value of mode MODE. This is closely related to the macro ‘TARGET_HARD_REGNO_NREGS’. In fact, the value returned by ‘TARGET_CLASS_MAX_NREGS (RCLASS, MODE)’ target hook should be the maximum value of ‘TARGET_HARD_REGNO_NREGS (REGNO, MODE)’ for all REGNO values in the class RCLASS. This target hook helps control the handling of multiple-word values in the reload pass. The default version of this target hook returns the size of MODE in words. -- Macro: CLASS_MAX_NREGS (CLASS, MODE) A C expression for the maximum number of consecutive registers of class CLASS needed to hold a value of mode MODE. This is closely related to the macro ‘TARGET_HARD_REGNO_NREGS’. In fact, the value of the macro ‘CLASS_MAX_NREGS (CLASS, MODE)’ should be the maximum value of ‘TARGET_HARD_REGNO_NREGS (REGNO, MODE)’ for all REGNO values in the class CLASS. This macro helps control the handling of multiple-word values in the reload pass. -- Target Hook: bool TARGET_CAN_CHANGE_MODE_CLASS (machine_mode FROM, machine_mode TO, reg_class_t RCLASS) This hook returns true if it is possible to bitcast values held in registers of class RCLASS from mode FROM to mode TO and if doing so preserves the low-order bits that are common to both modes. The result is only meaningful if RCLASS has registers that can hold both ‘from’ and ‘to’. The default implementation returns true. As an example of when such bitcasting is invalid, loading 32-bit integer or floating-point objects into floating-point registers on Alpha extends them to 64 bits. Therefore loading a 64-bit object and then storing it as a 32-bit object does not store the low-order 32 bits, as would be the case for a normal register. Therefore, ‘alpha.h’ defines ‘TARGET_CAN_CHANGE_MODE_CLASS’ to return: (GET_MODE_SIZE (from) == GET_MODE_SIZE (to) || !reg_classes_intersect_p (FLOAT_REGS, rclass)) Even if storing from a register in mode TO would be valid, if both FROM and ‘raw_reg_mode’ for RCLASS are wider than ‘word_mode’, then we must prevent TO narrowing the mode. This happens when the middle-end assumes that it can load or store pieces of an N-word pseudo, and that the pseudo will eventually be allocated to N ‘word_mode’ hard registers. Failure to prevent this kind of mode change will result in the entire ‘raw_reg_mode’ being modified instead of the partial value that the middle-end intended. -- Target Hook: reg_class_t TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS (int, REG_CLASS_T, REG_CLASS_T) A target hook which can change allocno class for given pseudo from allocno and best class calculated by IRA. The default version of this target hook always returns given class. -- Target Hook: bool TARGET_LRA_P (void) A target hook which returns true if we use LRA instead of reload pass. The default version of this target hook returns true. New ports should use LRA, and existing ports are encouraged to convert. -- Target Hook: int TARGET_REGISTER_PRIORITY (int) A target hook which returns the register priority number to which the register HARD_REGNO belongs to. The bigger the number, the more preferable the hard register usage (when all other conditions are the same). This hook can be used to prefer some hard register over others in LRA. For example, some x86-64 register usage needs additional prefix which makes instructions longer. The hook can return lower priority number for such registers make them less favorable and as result making the generated code smaller. The default version of this target hook returns always zero. -- Target Hook: bool TARGET_REGISTER_USAGE_LEVELING_P (void) A target hook which returns true if we need register usage leveling. That means if a few hard registers are equally good for the assignment, we choose the least used hard register. The register usage leveling may be profitable for some targets. Don't use the usage leveling for targets with conditional execution or targets with big register files as it hurts if-conversion and cross-jumping optimizations. The default version of this target hook returns always false. -- Target Hook: bool TARGET_DIFFERENT_ADDR_DISPLACEMENT_P (void) A target hook which returns true if an address with the same structure can have different maximal legitimate displacement. For example, the displacement can depend on memory mode or on operand combinations in the insn. The default version of this target hook returns always false. -- Target Hook: bool TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P (rtx SUBST) A target hook which returns ‘true’ if SUBST can't substitute safely pseudos with equivalent memory values during register allocation. The default version of this target hook returns ‘false’. On most machines, this default should be used. For generally machines with non orthogonal register usage for addressing, such as SH, this hook can be used to avoid excessive spilling. -- Target Hook: bool TARGET_LEGITIMIZE_ADDRESS_DISPLACEMENT (rtx *OFFSET1, rtx *OFFSET2, poly_int64 ORIG_OFFSET, machine_mode MODE) This hook tries to split address offset ORIG_OFFSET into two parts: one that should be added to the base address to create a local anchor point, and an additional offset that can be applied to the anchor to address a value of mode MODE. The idea is that the local anchor could be shared by other accesses to nearby locations. The hook returns true if it succeeds, storing the offset of the anchor from the base in OFFSET1 and the offset of the final address from the anchor in OFFSET2. The default implementation returns false. -- Target Hook: reg_class_t TARGET_SPILL_CLASS (reg_class_t, MACHINE_MODE) This hook defines a class of registers which could be used for spilling pseudos of the given mode and class, or ‘NO_REGS’ if only memory should be used. Not defining this hook is equivalent to returning ‘NO_REGS’ for all inputs. -- Target Hook: bool TARGET_ADDITIONAL_ALLOCNO_CLASS_P (reg_class_t) This hook should return ‘true’ if given class of registers should be an allocno class in any way. Usually RA uses only one register class from all classes containing the same register set. In some complicated cases, you need to have two or more such classes as allocno ones for RA correct work. Not defining this hook is equivalent to returning ‘false’ for all inputs. -- Target Hook: scalar_int_mode TARGET_CSTORE_MODE (enum insn_code ICODE) This hook defines the machine mode to use for the boolean result of conditional store patterns. The ICODE argument is the instruction code for the cstore being performed. Not definiting this hook is the same as accepting the mode encoded into operand 0 of the cstore expander patterns. -- Target Hook: int TARGET_COMPUTE_PRESSURE_CLASSES (enum reg_class *PRESSURE_CLASSES) A target hook which lets a backend compute the set of pressure classes to be used by those optimization passes which take register pressure into account, as opposed to letting IRA compute them. It returns the number of register classes stored in the array PRESSURE_CLASSES.  File: gccint.info, Node: Stack and Calling, Next: Varargs, Prev: Register Classes, Up: Target Macros 18.9 Stack Layout and Calling Conventions ========================================= This describes the stack layout and calling conventions. * Menu: * Frame Layout:: * Exception Handling:: * Stack Checking:: * Frame Registers:: * Elimination:: * Stack Arguments:: * Register Arguments:: * Scalar Return:: * Aggregate Return:: * Caller Saves:: * Function Entry:: * Profiling:: * Tail Calls:: * Shrink-wrapping separate components:: * Stack Smashing Protection:: * Miscellaneous Register Hooks::  File: gccint.info, Node: Frame Layout, Next: Exception Handling, Up: Stack and Calling 18.9.1 Basic Stack Layout ------------------------- Here is the basic stack layout. -- Macro: STACK_GROWS_DOWNWARD Define this macro to be true if pushing a word onto the stack moves the stack pointer to a smaller address, and false otherwise. -- Macro: STACK_PUSH_CODE This macro defines the operation used when something is pushed on the stack. In RTL, a push operation will be ‘(set (mem (STACK_PUSH_CODE (reg sp))) ...)’ The choices are ‘PRE_DEC’, ‘POST_DEC’, ‘PRE_INC’, and ‘POST_INC’. Which of these is correct depends on the stack direction and on whether the stack pointer points to the last item on the stack or whether it points to the space for the next item on the stack. The default is ‘PRE_DEC’ when ‘STACK_GROWS_DOWNWARD’ is true, which is almost always right, and ‘PRE_INC’ otherwise, which is often wrong. -- Macro: FRAME_GROWS_DOWNWARD Define this macro to nonzero value if the addresses of local variable slots are at negative offsets from the frame pointer. -- Macro: ARGS_GROW_DOWNWARD Define this macro if successive arguments to a function occupy decreasing addresses on the stack. -- Target Hook: HOST_WIDE_INT TARGET_STARTING_FRAME_OFFSET (void) This hook returns the offset from the frame pointer to the first local variable slot to be allocated. If ‘FRAME_GROWS_DOWNWARD’, it is the offset to _end_ of the first slot allocated, otherwise it is the offset to _beginning_ of the first slot allocated. The default implementation returns 0. -- Macro: STACK_ALIGNMENT_NEEDED Define to zero to disable final alignment of the stack during reload. The nonzero default for this macro is suitable for most ports. On ports where ‘TARGET_STARTING_FRAME_OFFSET’ is nonzero or where there is a register save block following the local block that doesn't require alignment to ‘STACK_BOUNDARY’, it may be beneficial to disable stack alignment and do it in the backend. -- Macro: STACK_POINTER_OFFSET Offset from the stack pointer register to the first location at which outgoing arguments are placed. If not specified, the default value of zero is used. This is the proper value for most machines. If ‘ARGS_GROW_DOWNWARD’, this is the offset to the location above the first location at which outgoing arguments are placed. -- Macro: FIRST_PARM_OFFSET (FUNDECL) Offset from the argument pointer register to the first argument's address. On some machines it may depend on the data type of the function. If ‘ARGS_GROW_DOWNWARD’, this is the offset to the location above the first argument's address. -- Macro: STACK_DYNAMIC_OFFSET (FUNDECL) Offset from the stack pointer register to an item dynamically allocated on the stack, e.g., by ‘alloca’. The default value for this macro is ‘STACK_POINTER_OFFSET’ plus the length of the outgoing arguments. The default is correct for most machines. See ‘function.cc’ for details. -- Macro: INITIAL_FRAME_ADDRESS_RTX A C expression whose value is RTL representing the address of the initial stack frame. This address is passed to ‘RETURN_ADDR_RTX’ and ‘DYNAMIC_CHAIN_ADDRESS’. If you don't define this macro, a reasonable default value will be used. Define this macro in order to make frame pointer elimination work in the presence of ‘__builtin_frame_address (count)’ and ‘__builtin_return_address (count)’ for ‘count’ not equal to zero. -- Macro: DYNAMIC_CHAIN_ADDRESS (FRAMEADDR) A C expression whose value is RTL representing the address in a stack frame where the pointer to the caller's frame is stored. Assume that FRAMEADDR is an RTL expression for the address of the stack frame itself. If you don't define this macro, the default is to return the value of FRAMEADDR--that is, the stack frame address is also the address of the stack word that points to the previous frame. -- Macro: SETUP_FRAME_ADDRESSES A C expression that produces the machine-specific code to setup the stack so that arbitrary frames can be accessed. For example, on the SPARC, we must flush all of the register windows to the stack before we can access arbitrary stack frames. You will seldom need to define this macro. The default is to do nothing. -- Target Hook: rtx TARGET_BUILTIN_SETJMP_FRAME_VALUE (void) This target hook should return an rtx that is used to store the address of the current frame into the built in ‘setjmp’ buffer. The default value, ‘virtual_stack_vars_rtx’, is correct for most machines. One reason you may need to define this target hook is if ‘hard_frame_pointer_rtx’ is the appropriate value on your machine. -- Macro: FRAME_ADDR_RTX (FRAMEADDR) A C expression whose value is RTL representing the value of the frame address for the current frame. FRAMEADDR is the frame pointer of the current frame. This is used for __builtin_frame_address. You need only define this macro if the frame address is not the same as the frame pointer. Most machines do not need to define it. -- Macro: RETURN_ADDR_RTX (COUNT, FRAMEADDR) A C expression whose value is RTL representing the value of the return address for the frame COUNT steps up from the current frame, after the prologue. FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of the COUNT − 1 frame if ‘RETURN_ADDR_IN_PREVIOUS_FRAME’ is nonzero. The value of the expression must always be the correct address when COUNT is zero, but may be ‘NULL_RTX’ if there is no way to determine the return address of other frames. -- Macro: RETURN_ADDR_IN_PREVIOUS_FRAME Define this macro to nonzero value if the return address of a particular stack frame is accessed from the frame pointer of the previous stack frame. The zero default for this macro is suitable for most ports. -- Macro: INCOMING_RETURN_ADDR_RTX A C expression whose value is RTL representing the location of the incoming return address at the beginning of any function, before the prologue. This RTL is either a ‘REG’, indicating that the return value is saved in ‘REG’, or a ‘MEM’ representing a location in the stack. You only need to define this macro if you want to support call frame debugging information like that provided by DWARF 2. If this RTL is a ‘REG’, you should also define ‘DWARF_FRAME_RETURN_COLUMN’ to ‘DWARF_FRAME_REGNUM (REGNO)’. -- Macro: DWARF_ALT_FRAME_RETURN_COLUMN A C expression whose value is an integer giving a DWARF 2 column number that may be used as an alternative return column. The column must not correspond to any gcc hard register (that is, it must not be in the range of ‘DWARF_FRAME_REGNUM’). This macro can be useful if ‘DWARF_FRAME_RETURN_COLUMN’ is set to a general register, but an alternative column needs to be used for signal frames. Some targets have also used different frame return columns over time. -- Macro: DWARF_ZERO_REG A C expression whose value is an integer giving a DWARF 2 register number that is considered to always have the value zero. This should only be defined if the target has an architected zero register, and someone decided it was a good idea to use that register number to terminate the stack backtrace. New ports should avoid this. -- Macro: DWARF_VERSION_DEFAULT A C expression whose value is the default dwarf standard version we'll honor and advertise when generating dwarf debug information, in absence of an explicit ‘-gdwarf-VERSION’ option on the command line. -- Target Hook: void TARGET_DWARF_HANDLE_FRAME_UNSPEC (const char *LABEL, rtx PATTERN, int INDEX) This target hook allows the backend to emit frame-related insns that contain UNSPECs or UNSPEC_VOLATILEs. The DWARF 2 call frame debugging info engine will invoke it on insns of the form (set (reg) (unspec [...] UNSPEC_INDEX)) and (set (reg) (unspec_volatile [...] UNSPECV_INDEX)). to let the backend emit the call frame instructions. LABEL is the CFI label attached to the insn, PATTERN is the pattern of the insn and INDEX is ‘UNSPEC_INDEX’ or ‘UNSPECV_INDEX’. -- Target Hook: unsigned int TARGET_DWARF_POLY_INDETERMINATE_VALUE (unsigned int I, unsigned int *FACTOR, int *OFFSET) Express the value of ‘poly_int’ indeterminate I as a DWARF expression, with I counting from 1. Return the number of a DWARF register R and set ‘*FACTOR’ and ‘*OFFSET’ such that the value of the indeterminate is: value_of(R) / FACTOR - OFFSET A target only needs to define this hook if it sets ‘NUM_POLY_INT_COEFFS’ to a value greater than 1. -- Macro: INCOMING_FRAME_SP_OFFSET A C expression whose value is an integer giving the offset, in bytes, from the value of the stack pointer register to the top of the stack frame at the beginning of any function, before the prologue. The top of the frame is defined to be the value of the stack pointer in the previous frame, just before the call instruction. You only need to define this macro if you want to support call frame debugging information like that provided by DWARF 2. -- Macro: DEFAULT_INCOMING_FRAME_SP_OFFSET Like ‘INCOMING_FRAME_SP_OFFSET’, but must be the same for all functions of the same ABI, and when using GAS ‘.cfi_*’ directives must also agree with the default CFI GAS emits. Define this macro only if ‘INCOMING_FRAME_SP_OFFSET’ can have different values between different functions of the same ABI or when ‘INCOMING_FRAME_SP_OFFSET’ does not agree with GAS default CFI. -- Macro: ARG_POINTER_CFA_OFFSET (FUNDECL) A C expression whose value is an integer giving the offset, in bytes, from the argument pointer to the canonical frame address (cfa). The final value should coincide with that calculated by ‘INCOMING_FRAME_SP_OFFSET’. Which is unfortunately not usable during virtual register instantiation. The default value for this macro is ‘FIRST_PARM_OFFSET (fundecl) + crtl->args.pretend_args_size’, which is correct for most machines; in general, the arguments are found immediately before the stack frame. Note that this is not the case on some targets that save registers into the caller's frame, such as SPARC and rs6000, and so such targets need to define this macro. You only need to define this macro if the default is incorrect, and you want to support call frame debugging information like that provided by DWARF 2. -- Macro: FRAME_POINTER_CFA_OFFSET (FUNDECL) If defined, a C expression whose value is an integer giving the offset in bytes from the frame pointer to the canonical frame address (cfa). The final value should coincide with that calculated by ‘INCOMING_FRAME_SP_OFFSET’. Normally the CFA is calculated as an offset from the argument pointer, via ‘ARG_POINTER_CFA_OFFSET’, but if the argument pointer is variable due to the ABI, this may not be possible. If this macro is defined, it implies that the virtual register instantiation should be based on the frame pointer instead of the argument pointer. Only one of ‘FRAME_POINTER_CFA_OFFSET’ and ‘ARG_POINTER_CFA_OFFSET’ should be defined. -- Macro: CFA_FRAME_BASE_OFFSET (FUNDECL) If defined, a C expression whose value is an integer giving the offset in bytes from the canonical frame address (cfa) to the frame base used in DWARF 2 debug information. The default is zero. A different value may reduce the size of debug information on some ports. -- Target Hook: bool TARGET_HAVE_STRUB_SUPPORT_FOR (tree) Returns true if the target supports stack scrubbing for the given function or type, otherwise return false. The default implementation always returns true. -- Macro: STACK_ADDRESS_OFFSET Offset from the stack pointer register to the boundary address between the stack area claimed by an active function, and stack ranges that could get clobbered if it called another function. It should NOT encompass any stack red zone, that is used in leaf functions. This value is added to the stack pointer register to compute the address returned by ‘__builtin_stack_address’, and this is its only use. If this macro is not defined, no offset is added. Defining it like ‘STACK_POINTER_OFFSET’ may be appropriate for many machines, but not all. On SPARC, for example, the register save area is *not* considered active or used by the active function, but rather as akin to the area in which call-preserved registers are saved by callees, so the stack address is above that area, even though the (unbiased) stack pointer points below it. This enables ‘__strub_leave’ to clear what would otherwise overlap with its own register save area. On PowerPC, ‘STACK_POINTER_OFFSET’ also reserves space for a save area, but that area is used by the caller rather than the callee, so the boundary address is below it. If the address is computed too high or too low, parts of a stack range that should be scrubbed may be left unscrubbed, scrubbing may corrupt active portions of the stack frame, and stack ranges may be doubly-scrubbed by caller and callee. -- Macro: TARGET_STRUB_USE_DYNAMIC_ARRAY If defined to nonzero, ‘__strub_leave’ will allocate a dynamic array covering the stack range that needs scrubbing before clearing it. Allocating the array tends to make scrubbing slower, but it enables the scrubbing to be safely implemented with a ‘memset’ call, which could make up for the difference. -- Macro: TARGET_STRUB_MAY_USE_MEMSET If defined to nonzero, enable ‘__strub_leave’ to be optimized so as to call ‘memset’ for stack scrubbing. This is only enabled by default if ‘TARGET_STRUB_USE_DYNAMIC_ARRAY’ is enabled; it's not advisable to enable it otherwise, since ‘memset’ would then likely overwrite its own stack frame, but it might work if the target ABI enables ‘memset’ to not use the stack at all, not even for arguments or its return address, and its implementation is trivial enough that it doesn't use a stack frame.  File: gccint.info, Node: Exception Handling, Next: Stack Checking, Prev: Frame Layout, Up: Stack and Calling 18.9.2 Exception Handling Support --------------------------------- -- Macro: EH_RETURN_DATA_REGNO (N) A C expression whose value is the Nth register number used for data by exception handlers, or ‘INVALID_REGNUM’ if fewer than N registers are usable. The exception handling library routines communicate with the exception handlers via a set of agreed upon registers. Ideally these registers should be call-clobbered; it is possible to use call-saved registers, but may negatively impact code size. The target must support at least 2 data registers, but should define 4 if there are enough free registers. You must define this macro if you want to support call frame exception handling like that provided by DWARF 2. -- Macro: EH_RETURN_STACKADJ_RTX A C expression whose value is RTL representing a location in which to store a stack adjustment to be applied before function return. This is used to unwind the stack to an exception handler's call frame. It will be assigned zero on code paths that return normally. Typically this is a call-clobbered hard register that is otherwise untouched by the epilogue, but could also be a stack slot. Do not define this macro if the stack pointer is saved and restored by the regular prolog and epilog code in the call frame itself; in this case, the exception handling library routines will update the stack location to be restored in place. Otherwise, you must define this macro if you want to support call frame exception handling like that provided by DWARF 2. -- Macro: EH_RETURN_HANDLER_RTX A C expression whose value is RTL representing a location in which to store the address of an exception handler to which we should return. It will not be assigned on code paths that return normally. Typically this is the location in the call frame at which the normal return address is stored. For targets that return by popping an address off the stack, this might be a memory address just below the _target_ call frame rather than inside the current call frame. If defined, ‘EH_RETURN_STACKADJ_RTX’ will have already been assigned, so it may be used to calculate the location of the target call frame. Some targets have more complex requirements than storing to an address calculable during initial code generation. In that case the ‘eh_return’ instruction pattern should be used instead. If you want to support call frame exception handling, you must define either this macro or the ‘eh_return’ instruction pattern. -- Macro: EH_RETURN_TAKEN_RTX A C expression whose value is RTL representing a location in which to store if the EH return path was taken instead of a normal return. This macro allows conditionally executing different code in the epilogue for the EH and normal return cases. When this macro is defined, the macros ‘EH_RETURN_STACKADJ_RTX’ and ‘EH_RETURN_HANDLER_RTX’ are only meaningful in the epilogue when 1 is stored to the specified location. The value 0 means normal return. -- Macro: RETURN_ADDR_OFFSET If defined, an integer-valued C expression for which rtl will be generated to add it to the exception handler address before it is searched in the exception handling tables, and to subtract it again from the address before using it to return to the exception handler. -- Macro: ASM_PREFERRED_EH_DATA_FORMAT (CODE, GLOBAL) This macro chooses the encoding of pointers embedded in the exception handling sections. If at all possible, this should be defined such that the exception handling section will not require dynamic relocations, and so may be read-only. CODE is 0 for data, 1 for code labels, 2 for function pointers. GLOBAL is true if the symbol may be affected by dynamic relocations. The macro should return a combination of the ‘DW_EH_PE_*’ defines as found in ‘dwarf2.h’. If this macro is not defined, pointers will not be encoded but represented directly. -- Macro: ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX (FILE, ENCODING, SIZE, ADDR, DONE) This macro allows the target to emit whatever special magic is required to represent the encoding chosen by ‘ASM_PREFERRED_EH_DATA_FORMAT’. Generic code takes care of pc-relative and indirect encodings; this must be defined if the target uses text-relative or data-relative encodings. This is a C statement that branches to DONE if the format was handled. ENCODING is the format chosen, SIZE is the number of bytes that the format occupies, ADDR is the ‘SYMBOL_REF’ to be emitted. -- Macro: MD_FALLBACK_FRAME_STATE_FOR (CONTEXT, FS) This macro allows the target to add CPU and operating system specific code to the call-frame unwinder for use when there is no unwind data available. The most common reason to implement this macro is to unwind through signal frames. This macro is called from ‘uw_frame_state_for’ in ‘unwind-dw2.c’, ‘unwind-dw2-xtensa.c’ and ‘unwind-ia64.c’. CONTEXT is an ‘_Unwind_Context’; FS is an ‘_Unwind_FrameState’. Examine ‘context->ra’ for the address of the code being executed and ‘context->cfa’ for the stack pointer value. If the frame can be decoded, the register save addresses should be updated in FS and the macro should evaluate to ‘_URC_NO_REASON’. If the frame cannot be decoded, the macro should evaluate to ‘_URC_END_OF_STACK’. For proper signal handling in Java this macro is accompanied by ‘MAKE_THROW_FRAME’, defined in ‘libjava/include/*-signal.h’ headers. -- Macro: MD_HANDLE_UNWABI (CONTEXT, FS) This macro allows the target to add operating system specific code to the call-frame unwinder to handle the IA-64 ‘.unwabi’ unwinding directive, usually used for signal or interrupt frames. This macro is called from ‘uw_update_context’ in libgcc's ‘unwind-ia64.c’. CONTEXT is an ‘_Unwind_Context’; FS is an ‘_Unwind_FrameState’. Examine ‘fs->unwabi’ for the abi and context in the ‘.unwabi’ directive. If the ‘.unwabi’ directive can be handled, the register save addresses should be updated in FS. -- Macro: TARGET_USES_WEAK_UNWIND_INFO A C expression that evaluates to true if the target requires unwind info to be given comdat linkage. Define it to be ‘1’ if comdat linkage is necessary. The default is ‘0’.  File: gccint.info, Node: Stack Checking, Next: Frame Registers, Prev: Exception Handling, Up: Stack and Calling 18.9.3 Specifying How Stack Checking is Done -------------------------------------------- GCC will check that stack references are within the boundaries of the stack, if the option ‘-fstack-check’ is specified, in one of three ways: 1. If the value of the ‘STACK_CHECK_BUILTIN’ macro is nonzero, GCC will assume that you have arranged for full stack checking to be done at appropriate places in the configuration files. GCC will not do other special processing. 2. If ‘STACK_CHECK_BUILTIN’ is zero and the value of the ‘STACK_CHECK_STATIC_BUILTIN’ macro is nonzero, GCC will assume that you have arranged for static stack checking (checking of the static stack frame of functions) to be done at appropriate places in the configuration files. GCC will only emit code to do dynamic stack checking (checking on dynamic stack allocations) using the third approach below. 3. If neither of the above are true, GCC will generate code to periodically "probe" the stack pointer using the values of the macros defined below. If neither STACK_CHECK_BUILTIN nor STACK_CHECK_STATIC_BUILTIN is defined, GCC will change its allocation strategy for large objects if the option ‘-fstack-check’ is specified: they will always be allocated dynamically if their size exceeds ‘STACK_CHECK_MAX_VAR_SIZE’ bytes. -- Macro: STACK_CHECK_BUILTIN A nonzero value if stack checking is done by the configuration files in a machine-dependent manner. You should define this macro if stack checking is required by the ABI of your machine or if you would like to do stack checking in some more efficient way than the generic approach. The default value of this macro is zero. -- Macro: STACK_CHECK_STATIC_BUILTIN A nonzero value if static stack checking is done by the configuration files in a machine-dependent manner. You should define this macro if you would like to do static stack checking in some more efficient way than the generic approach. The default value of this macro is zero. -- Macro: STACK_CHECK_PROBE_INTERVAL_EXP An integer specifying the interval at which GCC must generate stack probe instructions, defined as 2 raised to this integer. You will normally define this macro so that the interval be no larger than the size of the "guard pages" at the end of a stack area. The default value of 12 (4096-byte interval) is suitable for most systems. -- Macro: STACK_CHECK_MOVING_SP An integer which is nonzero if GCC should move the stack pointer page by page when doing probes. This can be necessary on systems where the stack pointer contains the bottom address of the memory area accessible to the executing thread at any point in time. In this situation an alternate signal stack is required in order to be able to recover from a stack overflow. The default value of this macro is zero. -- Macro: STACK_CHECK_PROTECT The number of bytes of stack needed to recover from a stack overflow, for languages where such a recovery is supported. The default value of 4KB/8KB with the ‘setjmp’/‘longjmp’-based exception handling mechanism and 8KB/12KB with other exception handling mechanisms should be adequate for most architectures and operating systems. The following macros are relevant only if neither STACK_CHECK_BUILTIN nor STACK_CHECK_STATIC_BUILTIN is defined; you can omit them altogether in the opposite case. -- Macro: STACK_CHECK_MAX_FRAME_SIZE The maximum size of a stack frame, in bytes. GCC will generate probe instructions in non-leaf functions to ensure at least this many bytes of stack are available. If a stack frame is larger than this size, stack checking will not be reliable and GCC will issue a warning. The default is chosen so that GCC only generates one instruction on most systems. You should normally not change the default value of this macro. -- Macro: STACK_CHECK_FIXED_FRAME_SIZE GCC uses this value to generate the above warning message. It represents the amount of fixed frame used by a function, not including space for any callee-saved registers, temporaries and user variables. You need only specify an upper bound for this amount and will normally use the default of four words. -- Macro: STACK_CHECK_MAX_VAR_SIZE The maximum size, in bytes, of an object that GCC will place in the fixed area of the stack frame when the user specifies ‘-fstack-check’. GCC computed the default from the values of the above macros and you will normally not need to override that default. -- Target Hook: HOST_WIDE_INT TARGET_STACK_CLASH_PROTECTION_ALLOCA_PROBE_RANGE (void) Some targets have an ABI defined interval for which no probing needs to be done. When a probe does need to be done this same interval is used as the probe distance up when doing stack clash protection for alloca. On such targets this value can be set to override the default probing up interval. Define this variable to return nonzero if such a probe range is required or zero otherwise. Defining this hook also requires your functions which make use of alloca to have at least 8 byes of outgoing arguments. If this is not the case the stack will be corrupted. You need not define this macro if it would always have the value zero.  File: gccint.info, Node: Frame Registers, Next: Elimination, Prev: Stack Checking, Up: Stack and Calling 18.9.4 Registers That Address the Stack Frame --------------------------------------------- This discusses registers that address the stack frame. -- Macro: STACK_POINTER_REGNUM The register number of the stack pointer register, which must also be a fixed register according to ‘FIXED_REGISTERS’. On most machines, the hardware determines which register this is. -- Macro: FRAME_POINTER_REGNUM The register number of the frame pointer register, which is used to access automatic variables in the stack frame. On some machines, the hardware determines which register this is. On other machines, you can choose any register you wish for this purpose. -- Macro: HARD_FRAME_POINTER_REGNUM On some machines the offset between the frame pointer and starting offset of the automatic variables is not known until after register allocation has been done (for example, because the saved registers are between these two locations). On those machines, define ‘FRAME_POINTER_REGNUM’ the number of a special, fixed register to be used internally until the offset is known, and define ‘HARD_FRAME_POINTER_REGNUM’ to be the actual hard register number used for the frame pointer. You should define this macro only in the very rare circumstances when it is not possible to calculate the offset between the frame pointer and the automatic variables until after register allocation has been completed. When this macro is defined, you must also indicate in your definition of ‘ELIMINABLE_REGS’ how to eliminate ‘FRAME_POINTER_REGNUM’ into either ‘HARD_FRAME_POINTER_REGNUM’ or ‘STACK_POINTER_REGNUM’. Do not define this macro if it would be the same as ‘FRAME_POINTER_REGNUM’. -- Macro: ARG_POINTER_REGNUM The register number of the arg pointer register, which is used to access the function's argument list. On some machines, this is the same as the frame pointer register. On some machines, the hardware determines which register this is. On other machines, you can choose any register you wish for this purpose. If this is not the same register as the frame pointer register, then you must mark it as a fixed register according to ‘FIXED_REGISTERS’, or arrange to be able to eliminate it (*note Elimination::). -- Macro: HARD_FRAME_POINTER_IS_FRAME_POINTER Define this to a preprocessor constant that is nonzero if ‘hard_frame_pointer_rtx’ and ‘frame_pointer_rtx’ should be the same. The default definition is ‘(HARD_FRAME_POINTER_REGNUM == FRAME_POINTER_REGNUM)’; you only need to define this macro if that definition is not suitable for use in preprocessor conditionals. -- Macro: HARD_FRAME_POINTER_IS_ARG_POINTER Define this to a preprocessor constant that is nonzero if ‘hard_frame_pointer_rtx’ and ‘arg_pointer_rtx’ should be the same. The default definition is ‘(HARD_FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)’; you only need to define this macro if that definition is not suitable for use in preprocessor conditionals. -- Macro: RETURN_ADDRESS_POINTER_REGNUM The register number of the return address pointer register, which is used to access the current function's return address from the stack. On some machines, the return address is not at a fixed offset from the frame pointer or stack pointer or argument pointer. This register can be defined to point to the return address on the stack, and then be converted by ‘ELIMINABLE_REGS’ into either the frame pointer or stack pointer. Do not define this macro unless there is no other way to get the return address from the stack. -- Macro: STATIC_CHAIN_REGNUM -- Macro: STATIC_CHAIN_INCOMING_REGNUM Register numbers used for passing a function's static chain pointer. If register windows are used, the register number as seen by the called function is ‘STATIC_CHAIN_INCOMING_REGNUM’, while the register number as seen by the calling function is ‘STATIC_CHAIN_REGNUM’. If these registers are the same, ‘STATIC_CHAIN_INCOMING_REGNUM’ need not be defined. The static chain register need not be a fixed register. If the static chain is passed in memory, these macros should not be defined; instead, the ‘TARGET_STATIC_CHAIN’ hook should be used. -- Target Hook: rtx TARGET_STATIC_CHAIN (const_tree FNDECL_OR_TYPE, bool INCOMING_P) This hook replaces the use of ‘STATIC_CHAIN_REGNUM’ et al for targets that may use different static chain locations for different nested functions. This may be required if the target has function attributes that affect the calling conventions of the function and those calling conventions use different static chain locations. The default version of this hook uses ‘STATIC_CHAIN_REGNUM’ et al. If the static chain is passed in memory, this hook should be used to provide rtx giving ‘mem’ expressions that denote where they are stored. Often the ‘mem’ expression as seen by the caller will be at an offset from the stack pointer and the ‘mem’ expression as seen by the callee will be at an offset from the frame pointer. The variables ‘stack_pointer_rtx’, ‘frame_pointer_rtx’, and ‘arg_pointer_rtx’ will have been initialized and should be used to refer to those items. -- Macro: DWARF_FRAME_REGISTERS This macro specifies the maximum number of hard registers that can be saved in a call frame. This is used to size data structures used in DWARF2 exception handling. Prior to GCC 3.0, this macro was needed in order to establish a stable exception handling ABI in the face of adding new hard registers for ISA extensions. In GCC 3.0 and later, the EH ABI is insulated from changes in the number of hard registers. Nevertheless, this macro can still be used to reduce the runtime memory requirements of the exception handling routines, which can be substantial if the ISA contains a lot of registers that are not call-saved. If this macro is not defined, it defaults to ‘FIRST_PSEUDO_REGISTER’. -- Macro: PRE_GCC3_DWARF_FRAME_REGISTERS This macro is similar to ‘DWARF_FRAME_REGISTERS’, but is provided for backward compatibility in pre GCC 3.0 compiled code. If this macro is not defined, it defaults to ‘DWARF_FRAME_REGISTERS’. -- Macro: DWARF_REG_TO_UNWIND_COLUMN (REGNO) Define this macro if the target's representation for dwarf registers is different than the internal representation for unwind column. Given a dwarf register, this macro should return the internal unwind column number to use instead. -- Macro: DWARF_FRAME_REGNUM (REGNO) Define this macro if the target's representation for dwarf registers used in .eh_frame or .debug_frame is different from that used in other debug info sections. Given a GCC hard register number, this macro should return the .eh_frame register number. The default is ‘DEBUGGER_REGNO (REGNO)’. -- Macro: DWARF2_FRAME_REG_OUT (REGNO, FOR_EH) Define this macro to map register numbers held in the call frame info that GCC has collected using ‘DWARF_FRAME_REGNUM’ to those that should be output in .debug_frame (‘FOR_EH’ is zero) and .eh_frame (‘FOR_EH’ is nonzero). The default is to return ‘REGNO’. -- Macro: REG_VALUE_IN_UNWIND_CONTEXT Define this macro if the target stores register values as ‘_Unwind_Word’ type in unwind context. It should be defined if target register size is larger than the size of ‘void *’. The default is to store register values as ‘void *’ type. -- Macro: ASSUME_EXTENDED_UNWIND_CONTEXT Define this macro to be 1 if the target always uses extended unwind context with version, args_size and by_value fields. If it is undefined, it will be defined to 1 when ‘REG_VALUE_IN_UNWIND_CONTEXT’ is defined and 0 otherwise. -- Macro: DWARF_LAZY_REGISTER_VALUE (REGNO, VALUE) Define this macro if the target has pseudo DWARF registers whose values need to be computed lazily on demand by the unwinder (such as when referenced in a CFA expression). The macro returns true if REGNO is such a register and stores its value in ‘*VALUE’ if so.  File: gccint.info, Node: Elimination, Next: Stack Arguments, Prev: Frame Registers, Up: Stack and Calling 18.9.5 Eliminating Frame Pointer and Arg Pointer ------------------------------------------------ This is about eliminating the frame pointer and arg pointer. -- Target Hook: bool TARGET_FRAME_POINTER_REQUIRED (void) This target hook should return ‘true’ if a function must have and use a frame pointer. This target hook is called in the reload pass. If its return value is ‘true’ the function will have a frame pointer. This target hook can in principle examine the current function and decide according to the facts, but on most machines the constant ‘false’ or the constant ‘true’ suffices. Use ‘false’ when the machine allows code to be generated with no frame pointer, and doing so saves some time or space. Use ‘true’ when there is no possible advantage to avoiding a frame pointer. In certain cases, the compiler does not know how to produce valid code without a frame pointer. The compiler recognizes those cases and automatically gives the function a frame pointer regardless of what ‘targetm.frame_pointer_required’ returns. You don't need to worry about them. In a function that does not require a frame pointer, the frame pointer register can be allocated for ordinary usage, unless you mark it as a fixed register. See ‘FIXED_REGISTERS’ for more information. Default return value is ‘false’. -- Macro: ELIMINABLE_REGS This macro specifies a table of register pairs used to eliminate unneeded registers that point into the stack frame. The definition of this macro is a list of structure initializations, each of which specifies an original and replacement register. On some machines, the position of the argument pointer is not known until the compilation is completed. In such a case, a separate hard register must be used for the argument pointer. This register can be eliminated by replacing it with either the frame pointer or the argument pointer, depending on whether or not the frame pointer has been eliminated. In this case, you might specify: #define ELIMINABLE_REGS \ {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} Note that the elimination of the argument pointer with the stack pointer is specified first since that is the preferred elimination. -- Target Hook: bool TARGET_CAN_ELIMINATE (const int FROM_REG, const int TO_REG) This target hook should return ‘true’ if the compiler is allowed to try to replace register number FROM_REG with register number TO_REG. This target hook will usually be ‘true’, since most of the cases preventing register elimination are things that the compiler already knows about. Default return value is ‘true’. -- Macro: INITIAL_ELIMINATION_OFFSET (FROM-REG, TO-REG, OFFSET-VAR) This macro returns the initial difference between the specified pair of registers. The value would be computed from information such as the result of ‘get_frame_size ()’ and the tables of registers ‘df_regs_ever_live_p’ and ‘call_used_regs’. -- Target Hook: void TARGET_COMPUTE_FRAME_LAYOUT (void) This target hook is called once each time the frame layout needs to be recalculated. The calculations can be cached by the target and can then be used by ‘INITIAL_ELIMINATION_OFFSET’ instead of re-computing the layout on every invocation of that hook. This is particularly useful for targets that have an expensive frame layout function. Implementing this callback is optional.  File: gccint.info, Node: Stack Arguments, Next: Register Arguments, Prev: Elimination, Up: Stack and Calling 18.9.6 Passing Function Arguments on the Stack ---------------------------------------------- The macros in this section control how arguments are passed on the stack. See the following section for other macros that control passing certain arguments in registers. -- Target Hook: bool TARGET_PROMOTE_PROTOTYPES (const_tree FNTYPE) This target hook returns ‘true’ if an argument declared in a prototype as an integral type smaller than ‘int’ should actually be passed as an ‘int’. In addition to avoiding errors in certain cases of mismatch, it also makes for better code on certain machines. The default is to not promote prototypes. -- Target Hook: bool TARGET_PUSH_ARGUMENT (unsigned int NPUSH) This target hook returns ‘true’ if push instructions will be used to pass outgoing arguments. When the push instruction usage is optional, NPUSH is nonzero to indicate the number of bytes to push. Otherwise, NPUSH is zero. If the target machine does not have a push instruction or push instruction should be avoided, ‘false’ should be returned. That directs GCC to use an alternate strategy: to allocate the entire argument block and then store the arguments into it. If this target hook may return ‘true’, ‘PUSH_ROUNDING’ must be defined. -- Macro: PUSH_ARGS_REVERSED A C expression. If nonzero, function arguments will be evaluated from last to first, rather than from first to last. If this macro is not defined, it defaults to ‘PUSH_ARGS’ on targets where the stack and args grow in opposite directions, and 0 otherwise. -- Macro: PUSH_ROUNDING (NPUSHED) A C expression that is the number of bytes actually pushed onto the stack when an instruction attempts to push NPUSHED bytes. On some machines, the definition #define PUSH_ROUNDING(BYTES) (BYTES) will suffice. But on other machines, instructions that appear to push one byte actually push two bytes in an attempt to maintain alignment. Then the definition should be #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1) If the value of this macro has a type, it should be an unsigned type. -- Macro: ACCUMULATE_OUTGOING_ARGS A C expression. If nonzero, the maximum amount of space required for outgoing arguments will be computed and placed into ‘crtl->outgoing_args_size’. No space will be pushed onto the stack for each call; instead, the function prologue should increase the stack frame size by this amount. Setting both ‘PUSH_ARGS’ and ‘ACCUMULATE_OUTGOING_ARGS’ is not proper. -- Macro: REG_PARM_STACK_SPACE (FNDECL) Define this macro if functions should assume that stack space has been allocated for arguments even when their values are passed in registers. The value of this macro is the size, in bytes, of the area reserved for arguments passed in registers for the function represented by FNDECL, which can be zero if GCC is calling a library function. The argument FNDECL can be the FUNCTION_DECL, or the type itself of the function. This space can be allocated by the caller, or be a part of the machine-dependent stack frame: ‘OUTGOING_REG_PARM_STACK_SPACE’ says which. -- Macro: INCOMING_REG_PARM_STACK_SPACE (FNDECL) Like ‘REG_PARM_STACK_SPACE’, but for incoming register arguments. Define this macro if space guaranteed when compiling a function body is different to space required when making a call, a situation that can arise with K&R style function definitions. -- Macro: OUTGOING_REG_PARM_STACK_SPACE (FNTYPE) Define this to a nonzero value if it is the responsibility of the caller to allocate the area reserved for arguments passed in registers when calling a function of FNTYPE. FNTYPE may be NULL if the function called is a library function. If ‘ACCUMULATE_OUTGOING_ARGS’ is defined, this macro controls whether the space for these arguments counts in the value of ‘crtl->outgoing_args_size’. -- Macro: STACK_PARMS_IN_REG_PARM_AREA Define this macro if ‘REG_PARM_STACK_SPACE’ is defined, but the stack parameters don't skip the area specified by it. Normally, when a parameter is not passed in registers, it is placed on the stack beyond the ‘REG_PARM_STACK_SPACE’ area. Defining this macro suppresses this behavior and causes the parameter to be passed on the stack in its natural location. -- Target Hook: poly_int64 TARGET_RETURN_POPS_ARGS (tree FUNDECL, tree FUNTYPE, poly_int64 SIZE) This target hook returns the number of bytes of its own arguments that a function pops on returning, or 0 if the function pops no arguments and the caller must therefore pop them all after the function returns. FUNDECL is a C variable whose value is a tree node that describes the function in question. Normally it is a node of type ‘FUNCTION_DECL’ that describes the declaration of the function. From this you can obtain the ‘DECL_ATTRIBUTES’ of the function. FUNTYPE is a C variable whose value is a tree node that describes the function in question. Normally it is a node of type ‘FUNCTION_TYPE’ that describes the data type of the function. From this it is possible to obtain the data types of the value and arguments (if known). When a call to a library function is being considered, FUNDECL will contain an identifier node for the library function. Thus, if you need to distinguish among various library functions, you can do so by their names. Note that "library function" in this context means a function used to perform arithmetic, whose name is known specially in the compiler and was not mentioned in the C code being compiled. SIZE is the number of bytes of arguments passed on the stack. If a variable number of bytes is passed, it is zero, and argument popping will always be the responsibility of the calling function. On the VAX, all functions always pop their arguments, so the definition of this macro is SIZE. On the 68000, using the standard calling convention, no functions pop their arguments, so the value of the macro is always 0 in this case. But an alternative calling convention is available in which functions that take a fixed number of arguments pop them but other functions (such as ‘printf’) pop nothing (the caller pops all). When this convention is in use, FUNTYPE is examined to determine whether a function takes a fixed number of arguments. -- Macro: CALL_POPS_ARGS (CUM) A C expression that should indicate the number of bytes a call sequence pops off the stack. It is added to the value of ‘RETURN_POPS_ARGS’ when compiling a function call. CUM is the variable in which all arguments to the called function have been accumulated. On certain architectures, such as the SH5, a call trampoline is used that pops certain registers off the stack, depending on the arguments that have been passed to the function. Since this is a property of the call site, not of the called function, ‘RETURN_POPS_ARGS’ is not appropriate.  File: gccint.info, Node: Register Arguments, Next: Scalar Return, Prev: Stack Arguments, Up: Stack and Calling 18.9.7 Passing Arguments in Registers ------------------------------------- This section describes the macros which let you control how various types of arguments are passed in registers or how they are arranged in the stack. -- Target Hook: rtx TARGET_FUNCTION_ARG (cumulative_args_t CA, const function_arg_info &ARG) Return an RTX indicating whether function argument ARG is passed in a register and if so, which register. Argument CA summarizes all the previous arguments. The return value is usually either a ‘reg’ RTX for the hard register in which to pass the argument, or zero to pass the argument on the stack. The value of the expression can also be a ‘parallel’ RTX. This is used when an argument is passed in multiple locations. The mode of the ‘parallel’ should be the mode of the entire argument. The ‘parallel’ holds any number of ‘expr_list’ pairs; each one describes where part of the argument is passed. In each ‘expr_list’ the first operand must be a ‘reg’ RTX for the hard register in which to pass this part of the argument, and the mode of the register RTX indicates how large this part of the argument is. The second operand of the ‘expr_list’ is a ‘const_int’ which gives the offset in bytes into the entire argument of where this part starts. As a special exception the first ‘expr_list’ in the ‘parallel’ RTX may have a first operand of zero. This indicates that the entire argument is also stored on the stack. The last time this hook is called, it is called with ‘MODE == VOIDmode’, and its result is passed to the ‘call’ or ‘call_value’ pattern as operands 2 and 3 respectively. The usual way to make the ISO library ‘stdarg.h’ work on a machine where some arguments are usually passed in registers, is to cause nameless arguments to be passed on the stack instead. This is done by making ‘TARGET_FUNCTION_ARG’ return 0 whenever NAMED is ‘false’. You may use the hook ‘targetm.calls.must_pass_in_stack’ in the definition of this macro to determine if this argument is of a type that must be passed in the stack. If ‘REG_PARM_STACK_SPACE’ is not defined and ‘TARGET_FUNCTION_ARG’ returns nonzero for such an argument, the compiler will abort. If ‘REG_PARM_STACK_SPACE’ is defined, the argument will be computed in the stack and then loaded into a register. -- Target Hook: bool TARGET_MUST_PASS_IN_STACK (const function_arg_info &ARG) This target hook should return ‘true’ if we should not pass ARG solely in registers. The file ‘expr.h’ defines a definition that is usually appropriate, refer to ‘expr.h’ for additional documentation. -- Target Hook: rtx TARGET_FUNCTION_INCOMING_ARG (cumulative_args_t CA, const function_arg_info &ARG) Define this hook if the caller and callee on the target have different views of where arguments are passed. Also define this hook if there are functions that are never directly called, but are invoked by the hardware and which have nonstandard calling conventions. In this case ‘TARGET_FUNCTION_ARG’ computes the register in which the caller passes the value, and ‘TARGET_FUNCTION_INCOMING_ARG’ should be defined in a similar fashion to tell the function being called where the arguments will arrive. ‘TARGET_FUNCTION_INCOMING_ARG’ can also return arbitrary address computation using hard register, which can be forced into a register, so that it can be used to pass special arguments. If ‘TARGET_FUNCTION_INCOMING_ARG’ is not defined, ‘TARGET_FUNCTION_ARG’ serves both purposes. -- Target Hook: bool TARGET_USE_PSEUDO_PIC_REG (void) This hook should return 1 in case pseudo register should be created for pic_offset_table_rtx during function expand. -- Target Hook: void TARGET_INIT_PIC_REG (void) Perform a target dependent initialization of pic_offset_table_rtx. This hook is called at the start of register allocation. -- Target Hook: int TARGET_ARG_PARTIAL_BYTES (cumulative_args_t CUM, const function_arg_info &ARG) This target hook returns the number of bytes at the beginning of an argument that must be put in registers. The value must be zero for arguments that are passed entirely in registers or that are entirely pushed on the stack. On some machines, certain arguments must be passed partially in registers and partially in memory. On these machines, typically the first few words of arguments are passed in registers, and the rest on the stack. If a multi-word argument (a ‘double’ or a structure) crosses that boundary, its first few words must be passed in registers and the rest must be pushed. This macro tells the compiler when this occurs, and how many bytes should go in registers. ‘TARGET_FUNCTION_ARG’ for these arguments should return the first register to be used by the caller for this argument; likewise ‘TARGET_FUNCTION_INCOMING_ARG’, for the called function. -- Target Hook: bool TARGET_PASS_BY_REFERENCE (cumulative_args_t CUM, const function_arg_info &ARG) This target hook should return ‘true’ if argument ARG at the position indicated by CUM should be passed by reference. This predicate is queried after target independent reasons for being passed by reference, such as ‘TREE_ADDRESSABLE (ARG.type)’. If the hook returns true, a copy of that argument is made in memory and a pointer to the argument is passed instead of the argument itself. The pointer is passed in whatever way is appropriate for passing a pointer to that type. -- Target Hook: bool TARGET_CALLEE_COPIES (cumulative_args_t CUM, const function_arg_info &ARG) The function argument described by the parameters to this hook is known to be passed by reference. The hook should return true if the function argument should be copied by the callee instead of copied by the caller. For any argument for which the hook returns true, if it can be determined that the argument is not modified, then a copy need not be generated. The default version of this hook always returns false. -- Macro: CUMULATIVE_ARGS A C type for declaring a variable that is used as the first argument of ‘TARGET_FUNCTION_ARG’ and other related values. For some target machines, the type ‘int’ suffices and can hold the number of bytes of argument so far. There is no need to record in ‘CUMULATIVE_ARGS’ anything about the arguments that have been passed on the stack. The compiler has other variables to keep track of that. For target machines on which all arguments are passed on the stack, there is no need to store anything in ‘CUMULATIVE_ARGS’; however, the data structure must exist and should not be empty, so use ‘int’. -- Macro: OVERRIDE_ABI_FORMAT (FNDECL) If defined, this macro is called before generating any code for a function, but after the CFUN descriptor for the function has been created. The back end may use this macro to update CFUN to reflect an ABI other than that which would normally be used by default. If the compiler is generating code for a compiler-generated function, FNDECL may be ‘NULL’. -- Macro: INIT_CUMULATIVE_ARGS (CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) A C statement (sans semicolon) for initializing the variable CUM for the state at the beginning of the argument list. The variable has type ‘CUMULATIVE_ARGS’. The value of FNTYPE is the tree node for the data type of the function which will receive the args, or 0 if the args are to a compiler support library function. For direct calls that are not libcalls, FNDECL contain the declaration node of the function. FNDECL is also set when ‘INIT_CUMULATIVE_ARGS’ is used to find arguments for the function being compiled. N_NAMED_ARGS is set to the number of named arguments, including a structure return address if it is passed as a parameter, when making a call. When processing incoming arguments, N_NAMED_ARGS is set to −1. When processing a call to a compiler support library function, LIBNAME identifies which one. It is a ‘symbol_ref’ rtx which contains the name of the function, as a string. LIBNAME is 0 when an ordinary C function call is being processed. Thus, each time this macro is called, either LIBNAME or FNTYPE is nonzero, but never both of them at once. -- Macro: INIT_CUMULATIVE_LIBCALL_ARGS (CUM, MODE, LIBNAME) Like ‘INIT_CUMULATIVE_ARGS’ but only used for outgoing libcalls, it gets a ‘MODE’ argument instead of FNTYPE, that would be ‘NULL’. INDIRECT would always be zero, too. If this macro is not defined, ‘INIT_CUMULATIVE_ARGS (cum, NULL_RTX, libname, 0)’ is used instead. -- Macro: INIT_CUMULATIVE_INCOMING_ARGS (CUM, FNTYPE, LIBNAME) Like ‘INIT_CUMULATIVE_ARGS’ but overrides it for the purposes of finding the arguments for the function being compiled. If this macro is undefined, ‘INIT_CUMULATIVE_ARGS’ is used instead. The value passed for LIBNAME is always 0, since library routines with special calling conventions are never compiled with GCC. The argument LIBNAME exists for symmetry with ‘INIT_CUMULATIVE_ARGS’. -- Target Hook: void TARGET_FUNCTION_ARG_ADVANCE (cumulative_args_t CA, const function_arg_info &ARG) This hook updates the summarizer variable pointed to by CA to advance past argument ARG in the argument list. Once this is done, the variable CUM is suitable for analyzing the _following_ argument with ‘TARGET_FUNCTION_ARG’, etc. This hook need not do anything if the argument in question was passed on the stack. The compiler knows how to track the amount of stack space used for arguments without any special help. -- Target Hook: HOST_WIDE_INT TARGET_FUNCTION_ARG_OFFSET (machine_mode MODE, const_tree TYPE) This hook returns the number of bytes to add to the offset of an argument of type TYPE and mode MODE when passed in memory. This is needed for the SPU, which passes ‘char’ and ‘short’ arguments in the preferred slot that is in the middle of the quad word instead of starting at the top. The default implementation returns 0. -- Target Hook: pad_direction TARGET_FUNCTION_ARG_PADDING (machine_mode MODE, const_tree TYPE) This hook determines whether, and in which direction, to pad out an argument of mode MODE and type TYPE. It returns ‘PAD_UPWARD’ to insert padding above the argument, ‘PAD_DOWNWARD’ to insert padding below the argument, or ‘PAD_NONE’ to inhibit padding. The _amount_ of padding is not controlled by this hook, but by ‘TARGET_FUNCTION_ARG_ROUND_BOUNDARY’. It is always just enough to reach the next multiple of that boundary. This hook has a default definition that is right for most systems. For little-endian machines, the default is to pad upward. For big-endian machines, the default is to pad downward for an argument of constant size shorter than an ‘int’, and upward otherwise. -- Macro: PAD_VARARGS_DOWN If defined, a C expression which determines whether the default implementation of va_arg will attempt to pad down before reading the next argument, if that argument is smaller than its aligned space as controlled by ‘PARM_BOUNDARY’. If this macro is not defined, all such arguments are padded down if ‘BYTES_BIG_ENDIAN’ is true. -- Macro: BLOCK_REG_PADDING (MODE, TYPE, FIRST) Specify padding for the last element of a block move between registers and memory. FIRST is nonzero if this is the only element. Defining this macro allows better control of register function parameters on big-endian machines, without using ‘PARALLEL’ rtl. In particular, ‘MUST_PASS_IN_STACK’ need not test padding and mode of types in registers, as there is no longer a "wrong" part of a register; For example, a three byte aggregate may be passed in the high part of a register if so required. -- Target Hook: unsigned int TARGET_FUNCTION_ARG_BOUNDARY (machine_mode MODE, const_tree TYPE) This hook returns the alignment boundary, in bits, of an argument with the specified mode and type. The default hook returns ‘PARM_BOUNDARY’ for all arguments. -- Target Hook: unsigned int TARGET_FUNCTION_ARG_ROUND_BOUNDARY (machine_mode MODE, const_tree TYPE) Normally, the size of an argument is rounded up to ‘PARM_BOUNDARY’, which is the default value for this hook. You can define this hook to return a different value if an argument size must be rounded to a larger value. -- Macro: FUNCTION_ARG_REGNO_P (REGNO) A C expression that is nonzero if REGNO is the number of a hard register in which function arguments are sometimes passed. This does _not_ include implicit arguments such as the static chain and the structure-value address. On many machines, no registers can be used for this purpose since all function arguments are pushed on the stack. -- Target Hook: bool TARGET_SPLIT_COMPLEX_ARG (const_tree TYPE) This hook should return true if parameter of type TYPE are passed as two scalar parameters. By default, GCC will attempt to pack complex arguments into the target's word size. Some ABIs require complex arguments to be split and treated as their individual components. For example, on AIX64, complex floats should be passed in a pair of floating point registers, even though a complex float would fit in one 64-bit floating point register. The default value of this hook is ‘NULL’, which is treated as always false. -- Target Hook: tree TARGET_BUILD_BUILTIN_VA_LIST (void) This hook returns a type node for ‘va_list’ for the target. The default version of the hook returns ‘void*’. -- Target Hook: int TARGET_ENUM_VA_LIST_P (int IDX, const char **PNAME, tree *PTREE) This target hook is used in function ‘c_common_nodes_and_builtins’ to iterate through the target specific builtin types for va_list. The variable IDX is used as iterator. PNAME has to be a pointer to a ‘const char *’ and PTREE a pointer to a ‘tree’ typed variable. The arguments PNAME and PTREE are used to store the result of this macro and are set to the name of the va_list builtin type and its internal type. If the return value of this macro is zero, then there is no more element. Otherwise the IDX should be increased for the next call of this macro to iterate through all types. -- Target Hook: tree TARGET_FN_ABI_VA_LIST (tree FNDECL) This hook returns the va_list type of the calling convention specified by FNDECL. The default version of this hook returns ‘va_list_type_node’. -- Target Hook: tree TARGET_CANONICAL_VA_LIST_TYPE (tree TYPE) This hook returns the va_list type of the calling convention specified by the type of TYPE. If TYPE is not a valid va_list type, it returns ‘NULL_TREE’. -- Target Hook: tree TARGET_GIMPLIFY_VA_ARG_EXPR (tree VALIST, tree TYPE, gimple_seq *PRE_P, gimple_seq *POST_P) This hook performs target-specific gimplification of ‘VA_ARG_EXPR’. The first two parameters correspond to the arguments to ‘va_arg’; the latter two are as in ‘gimplify.cc:gimplify_expr’. -- Target Hook: bool TARGET_VALID_POINTER_MODE (scalar_int_mode MODE) Define this to return nonzero if the port can handle pointers with machine mode MODE. The default version of this hook returns true for both ‘ptr_mode’ and ‘Pmode’. -- Target Hook: bool TARGET_REF_MAY_ALIAS_ERRNO (ao_ref *REF) Define this to return nonzero if the memory reference REF may alias with the system C library errno location. The default version of this hook assumes the system C library errno location is either a declaration of type int or accessed by dereferencing a pointer to int. -- Target Hook: machine_mode TARGET_TRANSLATE_MODE_ATTRIBUTE (machine_mode MODE) Define this hook if during mode attribute processing, the port should translate machine_mode MODE to another mode. For example, rs6000's ‘KFmode’, when it is the same as ‘TFmode’. The default version of the hook returns that mode that was passed in. -- Target Hook: bool TARGET_SCALAR_MODE_SUPPORTED_P (scalar_mode MODE) Define this to return nonzero if the port is prepared to handle insns involving scalar mode MODE. For a scalar mode to be considered supported, all the basic arithmetic and comparisons must work. The default version of this hook returns true for any mode required to handle the basic C types (as defined by the port). Included here are the double-word arithmetic supported by the code in ‘optabs.cc’. -- Target Hook: bool TARGET_VECTOR_MODE_SUPPORTED_P (machine_mode MODE) Define this to return nonzero if the current target is prepared to handle insns involving vector mode MODE. At the very least, it must have move patterns for this mode. -- Target Hook: bool TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P (machine_mode MODE) Define this to return nonzero if the port is prepared to handle insns involving vector mode MODE in any target configuration. Returning TRUE means that the mode can be used as the ‘TYPE_MODE’ for vector types. The default version of this hook returns true. The final mode assigned to ‘TYPE_MODE’ will also be checked against ‘TARGET_VECTOR_MODE_SUPPORTED_P’ to take target configuration into account. -- Target Hook: bool TARGET_COMPATIBLE_VECTOR_TYPES_P (const_tree TYPE1, const_tree TYPE2) Return true if there is no target-specific reason for treating vector types TYPE1 and TYPE2 as distinct types. The caller has already checked for target-independent reasons, meaning that the types are known to have the same mode, to have the same number of elements, and to have what the caller considers to be compatible element types. The main reason for defining this hook is to reject pairs of types that are handled differently by the target's calling convention. For example, when a new N-bit vector architecture is added to a target, the target may want to handle normal N-bit ‘VECTOR_TYPE’ arguments and return values in the same way as before, to maintain backwards compatibility. However, it may also provide new, architecture-specific ‘VECTOR_TYPE’s that are passed and returned in a more efficient way. It is then important to maintain a distinction between the "normal" ‘VECTOR_TYPE’s and the new architecture-specific ones. The default implementation returns true, which is correct for most targets. -- Target Hook: opt_machine_mode TARGET_ARRAY_MODE (machine_mode MODE, unsigned HOST_WIDE_INT NELEMS) Return the mode that GCC should use for an array that has NELEMS elements, with each element having mode MODE. Return no mode if the target has no special requirements. In the latter case, GCC looks for an integer mode of the appropriate size if available and uses BLKmode otherwise. Usually the search for the integer mode is limited to ‘MAX_FIXED_MODE_SIZE’, but the ‘TARGET_ARRAY_MODE_SUPPORTED_P’ hook allows a larger mode to be used in specific cases. The main use of this hook is to specify that an array of vectors should also have a vector mode. The default implementation returns no mode. -- Target Hook: bool TARGET_ARRAY_MODE_SUPPORTED_P (machine_mode MODE, unsigned HOST_WIDE_INT NELEMS) Return true if GCC should try to use a scalar mode to store an array of NELEMS elements, given that each element has mode MODE. Returning true here overrides the usual ‘MAX_FIXED_MODE’ limit and allows GCC to use any defined integer mode. One use of this hook is to support vector load and store operations that operate on several homogeneous vectors. For example, ARM NEON has operations like: int8x8x3_t vld3_s8 (const int8_t *) where the return type is defined as: typedef struct int8x8x3_t { int8x8_t val[3]; } int8x8x3_t; If this hook allows ‘val’ to have a scalar mode, then ‘int8x8x3_t’ can have the same mode. GCC can then store ‘int8x8x3_t’s in registers rather than forcing them onto the stack. -- Target Hook: bool TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P (scalar_float_mode MODE) Define this to return nonzero if libgcc provides support for the floating-point mode MODE, which is known to pass ‘TARGET_SCALAR_MODE_SUPPORTED_P’. The default version of this hook returns true for all of ‘SFmode’, ‘DFmode’, ‘XFmode’ and ‘TFmode’, if such modes exist. -- Target Hook: opt_scalar_float_mode TARGET_FLOATN_MODE (int N, bool EXTENDED) Define this to return the machine mode to use for the type ‘_FloatN’, if EXTENDED is false, or the type ‘_FloatNx’, if EXTENDED is true. If such a type is not supported, return ‘opt_scalar_float_mode ()’. The default version of this hook returns ‘SFmode’ for ‘_Float32’, ‘DFmode’ for ‘_Float64’ and ‘_Float32x’ and ‘TFmode’ for ‘_Float128’, if those modes exist and satisfy the requirements for those types and pass ‘TARGET_SCALAR_MODE_SUPPORTED_P’ and ‘TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P’; for ‘_Float64x’, it returns the first of ‘XFmode’ and ‘TFmode’ that exists and satisfies the same requirements; for other types, it returns ‘opt_scalar_float_mode ()’. The hook is only called for values of N and EXTENDED that are valid according to ISO/IEC TS 18661-3:2015; that is, N is one of 32, 64, 128, or, if EXTENDED is false, 16 or greater than 128 and a multiple of 32. -- Target Hook: bool TARGET_FLOATN_BUILTIN_P (int FUNC) Define this to return true if the ‘_FloatN’ and ‘_FloatNx’ built-in functions should implicitly enable the built-in function without the ‘__builtin_’ prefix in addition to the normal built-in function with the ‘__builtin_’ prefix. The default is to only enable built-in functions without the ‘__builtin_’ prefix for the GNU C langauge. In strict ANSI/ISO mode, the built-in function without the ‘__builtin_’ prefix is not enabled. The argument ‘FUNC’ is the ‘enum built_in_function’ id of the function to be enabled. -- Target Hook: bool TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P (machine_mode MODE) Define this to return nonzero for machine modes for which the port has small register classes. If this target hook returns nonzero for a given MODE, the compiler will try to minimize the lifetime of registers in MODE. The hook may be called with ‘VOIDmode’ as argument. In this case, the hook is expected to return nonzero if it returns nonzero for any mode. On some machines, it is risky to let hard registers live across arbitrary insns. Typically, these machines have instructions that require values to be in specific registers (like an accumulator), and reload will fail if the required hard register is used for another purpose across such an insn. Passes before reload do not know which hard registers will be used in an instruction, but the machine modes of the registers set or used in the instruction are already known. And for some machines, register classes are small for, say, integer registers but not for floating point registers. For example, the AMD x86-64 architecture requires specific registers for the legacy x86 integer instructions, but there are many SSE registers for floating point operations. On such targets, a good strategy may be to return nonzero from this hook for ‘INTEGRAL_MODE_P’ machine modes but zero for the SSE register classes. The default version of this hook returns false for any mode. It is always safe to redefine this hook to return with a nonzero value. But if you unnecessarily define it, you will reduce the amount of optimizations that can be performed in some cases. If you do not define this hook to return a nonzero value when it is required, the compiler will run out of spill registers and print a fatal error message.  File: gccint.info, Node: Scalar Return, Next: Aggregate Return, Prev: Register Arguments, Up: Stack and Calling 18.9.8 How Scalar Function Values Are Returned ---------------------------------------------- This section discusses the macros that control returning scalars as values--values that can fit in registers. -- Target Hook: rtx TARGET_FUNCTION_VALUE (const_tree RET_TYPE, const_tree FN_DECL_OR_TYPE, bool OUTGOING) Define this to return an RTX representing the place where a function returns or receives a value of data type RET_TYPE, a tree node representing a data type. FN_DECL_OR_TYPE is a tree node representing ‘FUNCTION_DECL’ or ‘FUNCTION_TYPE’ of a function being called. If OUTGOING is false, the hook should compute the register in which the caller will see the return value. Otherwise, the hook should return an RTX representing the place where a function returns a value. On many machines, only ‘TYPE_MODE (RET_TYPE)’ is relevant. (Actually, on most machines, scalar values are returned in the same place regardless of mode.) The value of the expression is usually a ‘reg’ RTX for the hard register where the return value is stored. The value can also be a ‘parallel’ RTX, if the return value is in multiple places. See ‘TARGET_FUNCTION_ARG’ for an explanation of the ‘parallel’ form. Note that the callee will populate every location specified in the ‘parallel’, but if the first element of the ‘parallel’ contains the whole return value, callers will use that element as the canonical location and ignore the others. The m68k port uses this type of ‘parallel’ to return pointers in both ‘%a0’ (the canonical location) and ‘%d0’. If ‘TARGET_PROMOTE_FUNCTION_RETURN’ returns true, you must apply the same promotion rules specified in ‘PROMOTE_MODE’ if VALTYPE is a scalar type. If the precise function being called is known, FUNC is a tree node (‘FUNCTION_DECL’) for it; otherwise, FUNC is a null pointer. This makes it possible to use a different value-returning convention for specific functions when all their calls are known. Some target machines have "register windows" so that the register in which a function returns its value is not the same as the one in which the caller sees the value. For such machines, you should return different RTX depending on OUTGOING. ‘TARGET_FUNCTION_VALUE’ is not used for return values with aggregate data types, because these are returned in another way. See ‘TARGET_STRUCT_VALUE_RTX’ and related macros, below. -- Macro: FUNCTION_VALUE (VALTYPE, FUNC) This macro has been deprecated. Use ‘TARGET_FUNCTION_VALUE’ for a new target instead. -- Macro: LIBCALL_VALUE (MODE) A C expression to create an RTX representing the place where a library function returns a value of mode MODE. Note that "library function" in this context means a compiler support routine, used to perform arithmetic, whose name is known specially by the compiler and was not mentioned in the C code being compiled. -- Target Hook: rtx TARGET_LIBCALL_VALUE (machine_mode MODE, const_rtx FUN) Define this hook if the back-end needs to know the name of the libcall function in order to determine where the result should be returned. The mode of the result is given by MODE and the name of the called library function is given by FUN. The hook should return an RTX representing the place where the library function result will be returned. If this hook is not defined, then LIBCALL_VALUE will be used. -- Macro: FUNCTION_VALUE_REGNO_P (REGNO) A C expression that is nonzero if REGNO is the number of a hard register in which the values of called function may come back. A register whose use for returning values is limited to serving as the second of a pair (for a value of type ‘double’, say) need not be recognized by this macro. So for most machines, this definition suffices: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0) If the machine has register windows, so that the caller and the called function use different registers for the return value, this macro should recognize only the caller's register numbers. This macro has been deprecated. Use ‘TARGET_FUNCTION_VALUE_REGNO_P’ for a new target instead. -- Target Hook: bool TARGET_FUNCTION_VALUE_REGNO_P (const unsigned int REGNO) A target hook that return ‘true’ if REGNO is the number of a hard register in which the values of called function may come back. A register whose use for returning values is limited to serving as the second of a pair (for a value of type ‘double’, say) need not be recognized by this target hook. If the machine has register windows, so that the caller and the called function use different registers for the return value, this target hook should recognize only the caller's register numbers. If this hook is not defined, then FUNCTION_VALUE_REGNO_P will be used. -- Macro: APPLY_RESULT_SIZE Define this macro if ‘untyped_call’ and ‘untyped_return’ need more space than is implied by ‘FUNCTION_VALUE_REGNO_P’ for saving and restoring an arbitrary return value. -- Target Hook: bool TARGET_OMIT_STRUCT_RETURN_REG Normally, when a function returns a structure by memory, the address is passed as an invisible pointer argument, but the compiler also arranges to return the address from the function like it would a normal pointer return value. Define this to true if that behavior is undesirable on your target. -- Target Hook: bool TARGET_RETURN_IN_MSB (const_tree TYPE) This hook should return true if values of type TYPE are returned at the most significant end of a register (in other words, if they are padded at the least significant end). You can assume that TYPE is returned in a register; the caller is required to check this. Note that the register provided by ‘TARGET_FUNCTION_VALUE’ must be able to hold the complete return value. For example, if a 1-, 2- or 3-byte structure is returned at the most significant end of a 4-byte register, ‘TARGET_FUNCTION_VALUE’ should provide an ‘SImode’ rtx.  File: gccint.info, Node: Aggregate Return, Next: Caller Saves, Prev: Scalar Return, Up: Stack and Calling 18.9.9 How Large Values Are Returned ------------------------------------ When a function value's mode is ‘BLKmode’ (and in some other cases), the value is not returned according to ‘TARGET_FUNCTION_VALUE’ (*note Scalar Return::). Instead, the caller passes the address of a block of memory in which the value should be stored. This address is called the “structure value address”. This section describes how to control returning structure values in memory. -- Target Hook: bool TARGET_RETURN_IN_MEMORY (const_tree TYPE, const_tree FNTYPE) This target hook should return a nonzero value to say to return the function value in memory, just as large structures are always returned. Here TYPE will be the data type of the value, and FNTYPE will be the type of the function doing the returning, or ‘NULL’ for libcalls. Note that values of mode ‘BLKmode’ must be explicitly handled by this function. Also, the option ‘-fpcc-struct-return’ takes effect regardless of this macro. On most systems, it is possible to leave the hook undefined; this causes a default definition to be used, whose value is the constant 1 for ‘BLKmode’ values, and 0 otherwise. Do not use this hook to indicate that structures and unions should always be returned in memory. You should instead use ‘DEFAULT_PCC_STRUCT_RETURN’ to indicate this. -- Macro: DEFAULT_PCC_STRUCT_RETURN Define this macro to be 1 if all structure and union return values must be in memory. Since this results in slower code, this should be defined only if needed for compatibility with other compilers or with an ABI. If you define this macro to be 0, then the conventions used for structure and union return values are decided by the ‘TARGET_RETURN_IN_MEMORY’ target hook. If not defined, this defaults to the value 1. -- Target Hook: rtx TARGET_STRUCT_VALUE_RTX (tree FNDECL, int INCOMING) This target hook should return the location of the structure value address (normally a ‘mem’ or ‘reg’), or 0 if the address is passed as an "invisible" first argument. Note that FNDECL may be ‘NULL’, for libcalls. You do not need to define this target hook if the address is always passed as an "invisible" first argument. On some architectures the place where the structure value address is found by the called function is not the same place that the caller put it. This can be due to register windows, or it could be because the function prologue moves it to a different place. INCOMING is ‘1’ or ‘2’ when the location is needed in the context of the called function, and ‘0’ in the context of the caller. If INCOMING is nonzero and the address is to be found on the stack, return a ‘mem’ which refers to the frame pointer. If INCOMING is ‘2’, the result is being used to fetch the structure value address at the beginning of a function. If you need to emit adjusting code, you should do it at this point. -- Macro: PCC_STATIC_STRUCT_RETURN Define this macro if the usual system convention on the target machine for returning structures and unions is for the called function to return the address of a static variable containing the value. Do not define this if the usual system convention is for the caller to pass an address to the subroutine. This macro has effect in ‘-fpcc-struct-return’ mode, but it does nothing when you use ‘-freg-struct-return’ mode. -- Target Hook: fixed_size_mode TARGET_GET_RAW_RESULT_MODE (int REGNO) This target hook returns the mode to be used when accessing raw return registers in ‘__builtin_return’. Define this macro if the value in REG_RAW_MODE is not correct. Use ‘VOIDmode’ if a register should be ignored for ‘__builtin_return’ purposes. -- Target Hook: fixed_size_mode TARGET_GET_RAW_ARG_MODE (int REGNO) This target hook returns the mode to be used when accessing raw argument registers in ‘__builtin_apply_args’. Define this macro if the value in REG_RAW_MODE is not correct. Use ‘VOIDmode’ if a register should be ignored for ‘__builtin_apply_args’ purposes. -- Target Hook: bool TARGET_EMPTY_RECORD_P (const_tree TYPE) This target hook returns true if the type is an empty record. The default is to return ‘false’. -- Target Hook: void TARGET_WARN_PARAMETER_PASSING_ABI (cumulative_args_t CA, tree TYPE) This target hook warns about the change in empty class parameter passing ABI.  File: gccint.info, Node: Caller Saves, Next: Function Entry, Prev: Aggregate Return, Up: Stack and Calling 18.9.10 Caller-Saves Register Allocation ---------------------------------------- If you enable it, GCC can save registers around function calls. This makes it possible to use call-clobbered registers to hold variables that must live across calls. -- Macro: HARD_REGNO_CALLER_SAVE_MODE (REGNO, NREGS) A C expression specifying which mode is required for saving NREGS of a pseudo-register in call-clobbered hard register REGNO. If REGNO is unsuitable for caller save, ‘VOIDmode’ should be returned. For most machines this macro need not be defined since GCC will select the smallest suitable mode.  File: gccint.info, Node: Function Entry, Next: Profiling, Prev: Caller Saves, Up: Stack and Calling 18.9.11 Function Entry and Exit ------------------------------- This section describes the macros that output function entry (“prologue”) and exit (“epilogue”) code. -- Target Hook: void TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY (FILE *FILE, unsigned HOST_WIDE_INT PATCH_AREA_SIZE, bool RECORD_P) Generate a patchable area at the function start, consisting of PATCH_AREA_SIZE NOP instructions. If the target supports named sections and if RECORD_P is true, insert a pointer to the current location in the table of patchable functions. The default implementation of the hook places the table of pointers in the special section named ‘__patchable_function_entries’. -- Target Hook: void TARGET_ASM_FUNCTION_PROLOGUE (FILE *FILE) If defined, a function that outputs the assembler code for entry to a function. The prologue is responsible for setting up the stack frame, initializing the frame pointer register, saving registers that must be saved, and allocating SIZE additional bytes of storage for the local variables. FILE is a stdio stream to which the assembler code should be output. The label for the beginning of the function need not be output by this macro. That has already been done when the macro is run. To determine which registers to save, the macro can refer to the array ‘regs_ever_live’: element R is nonzero if hard register R is used anywhere within the function. This implies the function prologue should save register R, provided it is not one of the call-used registers. (‘TARGET_ASM_FUNCTION_EPILOGUE’ must likewise use ‘regs_ever_live’.) On machines that have "register windows", the function entry code does not save on the stack the registers that are in the windows, even if they are supposed to be preserved by function calls; instead it takes appropriate steps to "push" the register stack, if any non-call-used registers are used in the function. On machines where functions may or may not have frame-pointers, the function entry code must vary accordingly; it must set up the frame pointer if one is wanted, and not otherwise. To determine whether a frame pointer is in wanted, the macro can refer to the variable ‘frame_pointer_needed’. The variable's value will be 1 at run time in a function that needs a frame pointer. *Note Elimination::. The function entry code is responsible for allocating any stack space required for the function. This stack space consists of the regions listed below. In most cases, these regions are allocated in the order listed, with the last listed region closest to the top of the stack (the lowest address if ‘STACK_GROWS_DOWNWARD’ is defined, and the highest address if it is not defined). You can use a different order for a machine if doing so is more convenient or required for compatibility reasons. Except in cases where required by standard or by a debugger, there is no reason why the stack layout used by GCC need agree with that used by other compilers for a machine. -- Target Hook: void TARGET_ASM_FUNCTION_END_PROLOGUE (FILE *FILE) If defined, a function that outputs assembler code at the end of a prologue. This should be used when the function prologue is being emitted as RTL, and you have some extra assembler that needs to be emitted. *Note prologue instruction pattern::. -- Target Hook: void TARGET_ASM_FUNCTION_BEGIN_EPILOGUE (FILE *FILE) If defined, a function that outputs assembler code at the start of an epilogue. This should be used when the function epilogue is being emitted as RTL, and you have some extra assembler that needs to be emitted. *Note epilogue instruction pattern::. -- Target Hook: void TARGET_ASM_FUNCTION_EPILOGUE (FILE *FILE) If defined, a function that outputs the assembler code for exit from a function. The epilogue is responsible for restoring the saved registers and stack pointer to their values when the function was called, and returning control to the caller. This macro takes the same argument as the macro ‘TARGET_ASM_FUNCTION_PROLOGUE’, and the registers to restore are determined from ‘regs_ever_live’ and ‘CALL_USED_REGISTERS’ in the same way. On some machines, there is a single instruction that does all the work of returning from the function. On these machines, give that instruction the name ‘return’ and do not define the macro ‘TARGET_ASM_FUNCTION_EPILOGUE’ at all. Do not define a pattern named ‘return’ if you want the ‘TARGET_ASM_FUNCTION_EPILOGUE’ to be used. If you want the target switches to control whether return instructions or epilogues are used, define a ‘return’ pattern with a validity condition that tests the target switches appropriately. If the ‘return’ pattern's validity condition is false, epilogues will be used. On machines where functions may or may not have frame-pointers, the function exit code must vary accordingly. Sometimes the code for these two cases is completely different. To determine whether a frame pointer is wanted, the macro can refer to the variable ‘frame_pointer_needed’. The variable's value will be 1 when compiling a function that needs a frame pointer. Normally, ‘TARGET_ASM_FUNCTION_PROLOGUE’ and ‘TARGET_ASM_FUNCTION_EPILOGUE’ must treat leaf functions specially. The C variable ‘current_function_is_leaf’ is nonzero for such a function. *Note Leaf Functions::. On some machines, some functions pop their arguments on exit while others leave that for the caller to do. For example, the 68020 when given ‘-mrtd’ pops arguments in functions that take a fixed number of arguments. Your definition of the macro ‘RETURN_POPS_ARGS’ decides which functions pop their own arguments. ‘TARGET_ASM_FUNCTION_EPILOGUE’ needs to know what was decided. The number of bytes of the current function's arguments that this function should pop is available in ‘crtl->args.pops_args’. *Note Scalar Return::. • A region of ‘crtl->args.pretend_args_size’ bytes of uninitialized space just underneath the first argument arriving on the stack. (This may not be at the very start of the allocated stack region if the calling sequence has pushed anything else since pushing the stack arguments. But usually, on such machines, nothing else has been pushed yet, because the function prologue itself does all the pushing.) This region is used on machines where an argument may be passed partly in registers and partly in memory, and, in some cases to support the features in ‘’. • An area of memory used to save certain registers used by the function. The size of this area, which may also include space for such things as the return address and pointers to previous stack frames, is machine-specific and usually depends on which registers have been used in the function. Machines with register windows often do not require a save area. • A region of at least SIZE bytes, possibly rounded up to an allocation boundary, to contain the local variables of the function. On some machines, this region and the save area may occur in the opposite order, with the save area closer to the top of the stack. • Optionally, when ‘ACCUMULATE_OUTGOING_ARGS’ is defined, a region of ‘crtl->outgoing_args_size’ bytes to be used for outgoing argument lists of the function. *Note Stack Arguments::. -- Macro: EXIT_IGNORE_STACK Define this macro as a C expression that is nonzero if the return instruction or the function epilogue ignores the value of the stack pointer; in other words, if it is safe to delete an instruction to adjust the stack pointer before a return from the function. The default is 0. Note that this macro's value is relevant only for functions for which frame pointers are maintained. It is never safe to delete a final stack adjustment in a function that has no frame pointer, and the compiler knows this regardless of ‘EXIT_IGNORE_STACK’. -- Macro: EPILOGUE_USES (REGNO) Define this macro as a C expression that is nonzero for registers that are used by the epilogue or the ‘return’ pattern. The stack and frame pointer registers are already assumed to be used as needed. -- Macro: EH_USES (REGNO) Define this macro as a C expression that is nonzero for registers that are used by the exception handling mechanism, and so should be considered live on entry to an exception edge. -- Target Hook: void TARGET_ASM_OUTPUT_MI_THUNK (FILE *FILE, tree THUNK_FNDECL, HOST_WIDE_INT DELTA, HOST_WIDE_INT VCALL_OFFSET, tree FUNCTION) A function that outputs the assembler code for a thunk function, used to implement C++ virtual function calls with multiple inheritance. The thunk acts as a wrapper around a virtual function, adjusting the implicit object parameter before handing control off to the real function. First, emit code to add the integer DELTA to the location that contains the incoming first argument. Assume that this argument contains a pointer, and is the one used to pass the ‘this’ pointer in C++. This is the incoming argument _before_ the function prologue, e.g. ‘%o0’ on a sparc. The addition must preserve the values of all other incoming arguments. Then, if VCALL_OFFSET is nonzero, an additional adjustment should be made after adding ‘delta’. In particular, if P is the adjusted pointer, the following adjustment should be made: p += (*((ptrdiff_t **)p))[vcall_offset/sizeof(ptrdiff_t)] After the additions, emit code to jump to FUNCTION, which is a ‘FUNCTION_DECL’. This is a direct pure jump, not a call, and does not touch the return address. Hence returning from FUNCTION will return to whoever called the current ‘thunk’. The effect must be as if FUNCTION had been called directly with the adjusted first argument. This macro is responsible for emitting all of the code for a thunk function; ‘TARGET_ASM_FUNCTION_PROLOGUE’ and ‘TARGET_ASM_FUNCTION_EPILOGUE’ are not invoked. The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already been extracted from it.) It might possibly be useful on some targets, but probably not. If you do not define this macro, the target-independent code in the C++ front end will generate a less efficient heavyweight thunk that calls FUNCTION instead of jumping to it. The generic approach does not support varargs. -- Target Hook: bool TARGET_ASM_CAN_OUTPUT_MI_THUNK (const_tree THUNK_FNDECL, HOST_WIDE_INT DELTA, HOST_WIDE_INT VCALL_OFFSET, const_tree FUNCTION) A function that returns true if TARGET_ASM_OUTPUT_MI_THUNK would be able to output the assembler code for the thunk function specified by the arguments it is passed, and false otherwise. In the latter case, the generic approach will be used by the C++ front end, with the limitations previously exposed.  File: gccint.info, Node: Profiling, Next: Tail Calls, Prev: Function Entry, Up: Stack and Calling 18.9.12 Generating Code for Profiling ------------------------------------- These macros will help you generate code for profiling. -- Macro: FUNCTION_PROFILER (FILE, LABELNO) A C statement or compound statement to output to FILE some assembler code to call the profiling subroutine ‘mcount’. The details of how ‘mcount’ expects to be called are determined by your operating system environment, not by GCC. To figure them out, compile a small program for profiling using the system's installed C compiler and look at the assembler code that results. Older implementations of ‘mcount’ expect the address of a counter variable to be loaded into some register. The name of this variable is ‘LP’ followed by the number LABELNO, so you would generate the name using ‘LP%d’ in a ‘fprintf’. -- Macro: PROFILE_HOOK A C statement or compound statement to output to FILE some assembly code to call the profiling subroutine ‘mcount’ even the target does not support profiling. -- Macro: NO_PROFILE_COUNTERS Define this macro to be an expression with a nonzero value if the ‘mcount’ subroutine on your system does not need a counter variable allocated for each function. This is true for almost all modern implementations. If you define this macro, you must not use the LABELNO argument to ‘FUNCTION_PROFILER’. -- Macro: PROFILE_BEFORE_PROLOGUE Define this macro if the code for function profiling should come before the function prologue. Normally, the profiling code comes after. -- Target Hook: bool TARGET_KEEP_LEAF_WHEN_PROFILED (void) This target hook returns true if the target wants the leaf flag for the current function to stay true even if it calls mcount. This might make sense for targets using the leaf flag only to determine whether a stack frame needs to be generated or not and for which the call to mcount is generated before the function prologue.  File: gccint.info, Node: Tail Calls, Next: Shrink-wrapping separate components, Prev: Profiling, Up: Stack and Calling 18.9.13 Permitting tail calls ----------------------------- -- Target Hook: bool TARGET_FUNCTION_OK_FOR_SIBCALL (tree DECL, tree EXP) True if it is OK to do sibling call optimization for the specified call expression EXP. DECL will be the called function, or ‘NULL’ if this is an indirect call. It is not uncommon for limitations of calling conventions to prevent tail calls to functions outside the current unit of translation, or during PIC compilation. The hook is used to enforce these restrictions, as the ‘sibcall’ md pattern cannot fail, or fall over to a "normal" call. The criteria for successful sibling call optimization may vary greatly between different architectures. -- Target Hook: void TARGET_EXTRA_LIVE_ON_ENTRY (bitmap REGS) Add any hard registers to REGS that are live on entry to the function. This hook only needs to be defined to provide registers that cannot be found by examination of FUNCTION_ARG_REGNO_P, the callee saved registers, STATIC_CHAIN_INCOMING_REGNUM, STATIC_CHAIN_REGNUM, TARGET_STRUCT_VALUE_RTX, FRAME_POINTER_REGNUM, EH_USES, FRAME_POINTER_REGNUM, ARG_POINTER_REGNUM, and the PIC_OFFSET_TABLE_REGNUM. -- Target Hook: void TARGET_SET_UP_BY_PROLOGUE (struct hard_reg_set_container *) This hook should add additional registers that are computed by the prologue to the hard regset for shrink-wrapping optimization purposes. -- Target Hook: bool TARGET_WARN_FUNC_RETURN (tree) True if a function's return statements should be checked for matching the function's return type. This includes checking for falling off the end of a non-void function. Return false if no such check should be made.  File: gccint.info, Node: Shrink-wrapping separate components, Next: Stack Smashing Protection, Prev: Tail Calls, Up: Stack and Calling 18.9.14 Shrink-wrapping separate components ------------------------------------------- The prologue may perform a variety of target dependent tasks such as saving callee-saved registers, saving the return address, aligning the stack, creating a stack frame, initializing the PIC register, setting up the static chain, etc. On some targets some of these tasks may be independent of others and thus may be shrink-wrapped separately. These independent tasks are referred to as components and are handled generically by the target independent parts of GCC. Using the following hooks those prologue or epilogue components can be shrink-wrapped separately, so that the initialization (and possibly teardown) those components do is not done as frequently on execution paths where this would unnecessary. What exactly those components are is up to the target code; the generic code treats them abstractly, as a bit in an ‘sbitmap’. These ‘sbitmap’s are allocated by the ‘shrink_wrap.get_separate_components’ and ‘shrink_wrap.components_for_bb’ hooks, and deallocated by the generic code. -- Target Hook: sbitmap TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS (void) This hook should return an ‘sbitmap’ with the bits set for those components that can be separately shrink-wrapped in the current function. Return ‘NULL’ if the current function should not get any separate shrink-wrapping. Don't define this hook if it would always return ‘NULL’. If it is defined, the other hooks in this group have to be defined as well. -- Target Hook: sbitmap TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB (basic_block) This hook should return an ‘sbitmap’ with the bits set for those components where either the prologue component has to be executed before the ‘basic_block’, or the epilogue component after it, or both. -- Target Hook: void TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS (sbitmap COMPONENTS, edge E, sbitmap EDGE_COMPONENTS, bool IS_PROLOGUE) This hook should clear the bits in the COMPONENTS bitmap for those components in EDGE_COMPONENTS that the target cannot handle on edge E, where IS_PROLOGUE says if this is for a prologue or an epilogue instead. -- Target Hook: void TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS (sbitmap) Emit prologue insns for the components indicated by the parameter. -- Target Hook: void TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS (sbitmap) Emit epilogue insns for the components indicated by the parameter. -- Target Hook: void TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS (sbitmap) Mark the components in the parameter as handled, so that the ‘prologue’ and ‘epilogue’ named patterns know to ignore those components. The target code should not hang on to the ‘sbitmap’, it will be deleted after this call.  File: gccint.info, Node: Stack Smashing Protection, Next: Miscellaneous Register Hooks, Prev: Shrink-wrapping separate components, Up: Stack and Calling 18.9.15 Stack smashing protection --------------------------------- -- Target Hook: tree TARGET_STACK_PROTECT_GUARD (void) This hook returns a ‘DECL’ node for the external variable to use for the stack protection guard. This variable is initialized by the runtime to some random value and is used to initialize the guard value that is placed at the top of the local stack frame. The type of this variable must be ‘ptr_type_node’. The default version of this hook creates a variable called ‘__stack_chk_guard’, which is normally defined in ‘libgcc2.c’. -- Target Hook: tree TARGET_STACK_PROTECT_FAIL (void) This hook returns a ‘CALL_EXPR’ that alerts the runtime that the stack protect guard variable has been modified. This expression should involve a call to a ‘noreturn’ function. The default version of this hook invokes a function called ‘__stack_chk_fail’, taking no arguments. This function is normally defined in ‘libgcc2.c’. -- Target Hook: bool TARGET_STACK_PROTECT_RUNTIME_ENABLED_P (void) Returns true if the target wants GCC's default stack protect runtime support, otherwise return false. The default implementation always returns true. -- Common Target Hook: bool TARGET_SUPPORTS_SPLIT_STACK (bool REPORT, struct gcc_options *OPTS) Whether this target supports splitting the stack when the options described in OPTS have been passed. This is called after options have been parsed, so the target may reject splitting the stack in some configurations. The default version of this hook returns false. If REPORT is true, this function may issue a warning or error; if REPORT is false, it must simply return a value -- Common Target Hook: vec TARGET_GET_VALID_OPTION_VALUES (int OPTION_CODE, const char *PREFIX) The hook is used for options that have a non-trivial list of possible option values. OPTION_CODE is option code of opt_code enum type. PREFIX is used for bash completion and allows an implementation to return more specific completion based on the prefix. All string values should be allocated from heap memory and consumers should release them. The result will be pruned to cases with PREFIX if not NULL.  File: gccint.info, Node: Miscellaneous Register Hooks, Prev: Stack Smashing Protection, Up: Stack and Calling 18.9.16 Miscellaneous register hooks ------------------------------------ -- Target Hook: bool TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS Set to true if each call that binds to a local definition explicitly clobbers or sets all non-fixed registers modified by performing the call. That is, by the call pattern itself, or by code that might be inserted by the linker (e.g. stubs, veneers, branch islands), but not including those modifiable by the callee. The affected registers may be mentioned explicitly in the call pattern, or included as clobbers in CALL_INSN_FUNCTION_USAGE. The default version of this hook is set to false. The purpose of this hook is to enable the fipa-ra optimization.  File: gccint.info, Node: Varargs, Next: Trampolines, Prev: Stack and Calling, Up: Target Macros 18.10 Implementing the Varargs Macros ===================================== GCC comes with an implementation of ‘’ and ‘’ that work without change on machines that pass arguments on the stack. Other machines require their own implementations of varargs, and the two machine independent header files must have conditionals to include it. ISO ‘’ differs from traditional ‘’ mainly in the calling convention for ‘va_start’. The traditional implementation takes just one argument, which is the variable in which to store the argument pointer. The ISO implementation of ‘va_start’ takes an additional second argument. The user is supposed to write the last named argument of the function here. However, ‘va_start’ should not use this argument. The way to find the end of the named arguments is with the built-in functions described below. -- Macro: __builtin_saveregs () Use this built-in function to save the argument registers in memory so that the varargs mechanism can access them. Both ISO and traditional versions of ‘va_start’ must use ‘__builtin_saveregs’, unless you use ‘TARGET_SETUP_INCOMING_VARARGS’ (see below) instead. On some machines, ‘__builtin_saveregs’ is open-coded under the control of the target hook ‘TARGET_EXPAND_BUILTIN_SAVEREGS’. On other machines, it calls a routine written in assembler language, found in ‘libgcc2.c’. Code generated for the call to ‘__builtin_saveregs’ appears at the beginning of the function, as opposed to where the call to ‘__builtin_saveregs’ is written, regardless of what the code is. This is because the registers must be saved before the function starts to use them for its own purposes. -- Macro: __builtin_next_arg (LASTARG) This builtin returns the address of the first anonymous stack argument, as type ‘void *’. If ‘ARGS_GROW_DOWNWARD’, it returns the address of the location above the first anonymous stack argument. Use it in ‘va_start’ to initialize the pointer for fetching arguments from the stack. Also use it in ‘va_start’ to verify that the second parameter LASTARG is the last named argument of the current function. -- Macro: __builtin_classify_type (OBJECT) Since each machine has its own conventions for which data types are passed in which kind of register, your implementation of ‘va_arg’ has to embody these conventions. The easiest way to categorize the specified data type is to use ‘__builtin_classify_type’ together with ‘sizeof’ and ‘__alignof__’. ‘__builtin_classify_type’ ignores the value of OBJECT, considering only its data type. It returns an integer describing what kind of type that is--integer, floating, pointer, structure, and so on. The file ‘typeclass.h’ defines an enumeration that you can use to interpret the values of ‘__builtin_classify_type’. These machine description macros help implement varargs: -- Target Hook: rtx TARGET_EXPAND_BUILTIN_SAVEREGS (void) If defined, this hook produces the machine-specific code for a call to ‘__builtin_saveregs’. This code will be moved to the very beginning of the function, before any parameter access are made. The return value of this function should be an RTX that contains the value to use as the return of ‘__builtin_saveregs’. -- Target Hook: void TARGET_SETUP_INCOMING_VARARGS (cumulative_args_t ARGS_SO_FAR, const function_arg_info &ARG, int *PRETEND_ARGS_SIZE, int SECOND_TIME) This target hook offers an alternative to using ‘__builtin_saveregs’ and defining the hook ‘TARGET_EXPAND_BUILTIN_SAVEREGS’. Use it to store the anonymous register arguments into the stack so that all the arguments appear to have been passed consecutively on the stack. Once this is done, you can use the standard implementation of varargs that works for machines that pass all their arguments on the stack. The argument ARGS_SO_FAR points to the ‘CUMULATIVE_ARGS’ data structure, containing the values that are obtained after processing the named arguments. The argument ARG describes the last of these named arguments. The argument ARG should not be used if the function type satisfies ‘TYPE_NO_NAMED_ARGS_STDARG_P’, since in that case there are no named arguments and all arguments are accessed with ‘va_arg’. The target hook should do two things: first, push onto the stack all the argument registers _not_ used for the named arguments, and second, store the size of the data thus pushed into the ‘int’-valued variable pointed to by PRETEND_ARGS_SIZE. The value that you store here will serve as additional offset for setting up the stack frame. Because you must generate code to push the anonymous arguments at compile time without knowing their data types, ‘TARGET_SETUP_INCOMING_VARARGS’ is only useful on machines that have just a single category of argument register and use it uniformly for all data types. If the argument SECOND_TIME is nonzero, it means that the arguments of the function are being analyzed for the second time. This happens for an inline function, which is not actually compiled until the end of the source file. The hook ‘TARGET_SETUP_INCOMING_VARARGS’ should not generate any instructions in this case. -- Target Hook: bool TARGET_STRICT_ARGUMENT_NAMING (cumulative_args_t CA) Define this hook to return ‘true’ if the location where a function argument is passed depends on whether or not it is a named argument. This hook controls how the NAMED argument to ‘TARGET_FUNCTION_ARG’ is set for varargs and stdarg functions. If this hook returns ‘true’, the NAMED argument is always true for named arguments, and false for unnamed arguments. If it returns ‘false’, but ‘TARGET_PRETEND_OUTGOING_VARARGS_NAMED’ returns ‘true’, then all arguments are treated as named. Otherwise, all named arguments except the last are treated as named. You need not define this hook if it always returns ‘false’. -- Target Hook: void TARGET_START_CALL_ARGS (cumulative_args_t COMPLETE_ARGS) This target hook is invoked while generating RTL for a function call, after the argument values have been computed, and after stack arguments have been initialized, but before register arguments have been moved into their ABI-defined hard register locations. It precedes calls to the related hooks ‘TARGET_CALL_ARGS’ and ‘TARGET_END_CALL_ARGS’. The significance of this position in the call expansion is that: • No argument registers are live. • Although a call sequence can in general involve subcalls (such as using ‘memcpy’ to copy large arguments), no such subcall will occur between the call to this hook and the generation of the main call instruction. The single argument COMPLETE_ARGS is the state of the target function's cumulative argument information after the final call to ‘TARGET_FUNCTION_ARG’. The hook can be used for things like switching processor mode, in cases where different calls need different processor modes. Most ports do not need to implement anything for this hook. -- Target Hook: void TARGET_CALL_ARGS (cumulative_args_t COMPLETE_ARGS, rtx LOC, tree TYPE) While generating RTL for a function call, this target hook is invoked once for each argument passed to the function, either a register returned by ‘TARGET_FUNCTION_ARG’ or a memory location. It is called just before the point where argument registers are stored. COMPLETE_ARGS is the state of the target function's cumulative argument information after the final call to ‘TARGET_FUNCTION_ARG’. LOC is the location of the argument. TYPE is the type of the function being called, or ‘NULL_TREE’ for libcalls. For functions without arguments, the hook is called once with ‘pc_rtx’ passed instead of an argument register. This functionality can be used to perform special setup of call argument registers, if a target needs it. Most ports do not need to implement anything for this hook. -- Target Hook: void TARGET_END_CALL_ARGS (cumulative_args_t COMPLETE_ARGS) This target hook is invoked while generating RTL for a function call, just after the point where the return reg is copied into a pseudo. It signals that all the call argument and return registers for the just emitted call are now no longer in use. COMPLETE_ARGS is the state of the target function's cumulative argument information after the final call to ‘TARGET_FUNCTION_ARG’. Most ports do not need to implement anything for this hook. -- Target Hook: bool TARGET_PRETEND_OUTGOING_VARARGS_NAMED (cumulative_args_t CA) If you need to conditionally change ABIs so that one works with ‘TARGET_SETUP_INCOMING_VARARGS’, but the other works like neither ‘TARGET_SETUP_INCOMING_VARARGS’ nor ‘TARGET_STRICT_ARGUMENT_NAMING’ was defined, then define this hook to return ‘true’ if ‘TARGET_SETUP_INCOMING_VARARGS’ is used, ‘false’ otherwise. Otherwise, you should not define this hook.  File: gccint.info, Node: Trampolines, Next: Library Calls, Prev: Varargs, Up: Target Macros 18.11 Support for Nested Functions ================================== Taking the address of a nested function requires special compiler handling to ensure that the static chain register is loaded when the function is invoked via an indirect call. GCC has traditionally supported nested functions by creating an executable “trampoline” at run time when the address of a nested function is taken. This is a small piece of code which normally resides on the stack, in the stack frame of the containing function. The trampoline loads the static chain register and then jumps to the real address of the nested function. The use of trampolines requires an executable stack, which is a security risk. To avoid this problem, GCC also supports another strategy: using descriptors for nested functions. Under this model, taking the address of a nested function results in a pointer to a non-executable function descriptor object. Initializing the static chain from the descriptor is handled at indirect call sites. On some targets, including HPPA and IA-64, function descriptors may be mandated by the ABI or be otherwise handled in a target-specific way by the back end in its code generation strategy for indirect calls. GCC also provides its own generic descriptor implementation to support the ‘-fno-trampolines’ option. In this case runtime detection of function descriptors at indirect call sites relies on descriptor pointers being tagged with a bit that is never set in bare function addresses. Since GCC's generic function descriptors are not ABI-compliant, this option is typically used only on a per-language basis (notably by Ada) or when it can otherwise be applied to the whole program. For languages other than Ada, the ‘-ftrampolines’ and ‘-fno-trampolines’ options currently have no effect, and trampolines are always generated on platforms that need them for nested functions. Define the following hook if your backend either implements ABI-specified descriptor support, or can use GCC's generic descriptor implementation for nested functions. -- Target Hook: int TARGET_CUSTOM_FUNCTION_DESCRIPTORS If the target can use GCC's generic descriptor mechanism for nested functions, define this hook to a power of 2 representing an unused bit in function pointers which can be used to differentiate descriptors at run time. This value gives the number of bytes by which descriptor pointers are misaligned compared to function pointers. For example, on targets that require functions to be aligned to a 4-byte boundary, a value of either 1 or 2 is appropriate unless the architecture already reserves the bit for another purpose, such as on ARM. Define this hook to 0 if the target implements ABI support for function descriptors in its standard calling sequence, like for example HPPA or IA-64. Using descriptors for nested functions eliminates the need for trampolines that reside on the stack and require it to be made executable. The following macros tell GCC how to generate code to allocate and initialize an executable trampoline. You can also use this interface if your back end needs to create ABI-specified non-executable descriptors; in this case the "trampoline" created is the descriptor containing data only. The instructions in an executable trampoline must do two things: load a constant address into the static chain register, and jump to the real address of the nested function. On CISC machines such as the m68k, this requires two instructions, a move immediate and a jump. Then the two addresses exist in the trampoline as word-long immediate operands. On RISC machines, it is often necessary to load each address into a register in two parts. Then pieces of each address form separate immediate operands. The code generated to initialize the trampoline must store the variable parts--the static chain value and the function address--into the immediate operands of the instructions. On a CISC machine, this is simply a matter of copying each address to a memory reference at the proper offset from the start of the trampoline. On a RISC machine, it may be necessary to take out pieces of the address and store them separately. -- Target Hook: void TARGET_ASM_TRAMPOLINE_TEMPLATE (FILE *F) This hook is called by ‘assemble_trampoline_template’ to output, on the stream F, assembler code for a block of data that contains the constant parts of a trampoline. This code should not include a label--the label is taken care of automatically. If you do not define this hook, it means no template is needed for the target. Do not define this hook on systems where the block move code to copy the trampoline into place would be larger than the code to generate it on the spot. -- Macro: TRAMPOLINE_SECTION Return the section into which the trampoline template is to be placed (*note Sections::). The default value is ‘readonly_data_section’. -- Macro: TRAMPOLINE_SIZE A C expression for the size in bytes of the trampoline, as an integer. -- Macro: TRAMPOLINE_ALIGNMENT Alignment required for trampolines, in bits. If you don't define this macro, the value of ‘FUNCTION_ALIGNMENT’ is used for aligning trampolines. -- Target Hook: void TARGET_TRAMPOLINE_INIT (rtx M_TRAMP, tree FNDECL, rtx STATIC_CHAIN) This hook is called to initialize a trampoline. M_TRAMP is an RTX for the memory block for the trampoline; FNDECL is the ‘FUNCTION_DECL’ for the nested function; STATIC_CHAIN is an RTX for the static chain value that should be passed to the function when it is called. If the target defines ‘TARGET_ASM_TRAMPOLINE_TEMPLATE’, then the first thing this hook should do is emit a block move into M_TRAMP from the memory block returned by ‘assemble_trampoline_template’. Note that the block move need only cover the constant parts of the trampoline. If the target isolates the variable parts of the trampoline to the end, not all ‘TRAMPOLINE_SIZE’ bytes need be copied. If the target requires any other actions, such as flushing caches (possibly calling function maybe_emit_call_builtin___clear_cache) or enabling stack execution, these actions should be performed after initializing the trampoline proper. -- Target Hook: void TARGET_EMIT_CALL_BUILTIN___CLEAR_CACHE (rtx BEGIN, rtx END) On targets that do not define a ‘clear_cache’ insn expander, but that define the ‘CLEAR_CACHE_INSN’ macro, maybe_emit_call_builtin___clear_cache relies on this target hook to clear an address range in the instruction cache. The default implementation calls the ‘__clear_cache’ builtin, taking the assembler name from the builtin declaration. Overriding definitions may call alternate functions, with alternate calling conventions, or emit alternate RTX to perform the job. -- Target Hook: rtx TARGET_TRAMPOLINE_ADJUST_ADDRESS (rtx ADDR) This hook should perform any machine-specific adjustment in the address of the trampoline. Its argument contains the address of the memory block that was passed to ‘TARGET_TRAMPOLINE_INIT’. In case the address to be used for a function call should be different from the address at which the template was stored, the different address should be returned; otherwise ADDR should be returned unchanged. If this hook is not defined, ADDR will be used for function calls. Implementing trampolines is difficult on many machines because they have separate instruction and data caches. Writing into a stack location fails to clear the memory in the instruction cache, so when the program jumps to that location, it executes the old contents. Here are two possible solutions. One is to clear the relevant parts of the instruction cache whenever a trampoline is set up. The other is to make all trampolines identical, by having them jump to a standard subroutine. The former technique makes trampoline execution faster; the latter makes initialization faster. To clear the instruction cache when a trampoline is initialized, define the following macro. -- Macro: CLEAR_INSN_CACHE (BEG, END) If defined, expands to a C expression clearing the _instruction cache_ in the specified interval. The definition of this macro would typically be a series of ‘asm’ statements. Both BEG and END are pointer expressions. To use a standard subroutine, define the following macro. In addition, you must make sure that the instructions in a trampoline fill an entire cache line with identical instructions, or else ensure that the beginning of the trampoline code is always aligned at the same point in its cache line. Look in ‘m68k.h’ as a guide. -- Macro: TRANSFER_FROM_TRAMPOLINE Define this macro if trampolines need a special subroutine to do their work. The macro should expand to a series of ‘asm’ statements which will be compiled with GCC. They go in a library function named ‘__transfer_from_trampoline’. If you need to avoid executing the ordinary prologue code of a compiled C function when you jump to the subroutine, you can do so by placing a special label of your own in the assembler code. Use one ‘asm’ statement to generate an assembler label, and another to make the label global. Then trampolines can use that label to jump directly to your special assembler code.  File: gccint.info, Node: Library Calls, Next: Addressing Modes, Prev: Trampolines, Up: Target Macros 18.12 Implicit Calls to Library Routines ======================================== Here is an explanation of implicit calls to library routines. -- Macro: DECLARE_LIBRARY_RENAMES This macro, if defined, should expand to a piece of C code that will get expanded when compiling functions for libgcc.a. It can be used to provide alternate names for GCC's internal library functions if there are ABI-mandated names that the compiler should provide. -- Target Hook: void TARGET_INIT_LIBFUNCS (void) This hook should declare additional library routines or rename existing ones, using the functions ‘set_optab_libfunc’ and ‘init_one_libfunc’ defined in ‘optabs.cc’. ‘init_optabs’ calls this macro after initializing all the normal library routines. The default is to do nothing. Most ports don't need to define this hook. -- Target Hook: bool TARGET_LIBFUNC_GNU_PREFIX If false (the default), internal library routines start with two underscores. If set to true, these routines start with ‘__gnu_’ instead. E.g., ‘__muldi3’ changes to ‘__gnu_muldi3’. This currently only affects functions defined in ‘libgcc2.c’. If this is set to true, the ‘tm.h’ file must also ‘#define LIBGCC2_GNU_PREFIX’. -- Macro: FLOAT_LIB_COMPARE_RETURNS_BOOL (MODE, COMPARISON) This macro should return ‘true’ if the library routine that implements the floating point comparison operator COMPARISON in mode MODE will return a boolean, and FALSE if it will return a tristate. GCC's own floating point libraries return tristates from the comparison operators, so the default returns false always. Most ports don't need to define this macro. -- Macro: TARGET_LIB_INT_CMP_BIASED This macro should evaluate to ‘true’ if the integer comparison functions (like ‘__cmpdi2’) return 0 to indicate that the first operand is smaller than the second, 1 to indicate that they are equal, and 2 to indicate that the first operand is greater than the second. If this macro evaluates to ‘false’ the comparison functions return −1, 0, and 1 instead of 0, 1, and 2. If the target uses the routines in ‘libgcc.a’, you do not need to define this macro. -- Macro: TARGET_HAS_NO_HW_DIVIDE This macro should be defined if the target has no hardware divide instructions. If this macro is defined, GCC will use an algorithm which make use of simple logical and arithmetic operations for 64-bit division. If the macro is not defined, GCC will use an algorithm which make use of a 64-bit by 32-bit divide primitive. -- Macro: TARGET_EDOM The value of ‘EDOM’ on the target machine, as a C integer constant expression. If you don't define this macro, GCC does not attempt to deposit the value of ‘EDOM’ into ‘errno’ directly. Look in ‘/usr/include/errno.h’ to find the value of ‘EDOM’ on your system. If you do not define ‘TARGET_EDOM’, then compiled code reports domain errors by calling the library function and letting it report the error. If mathematical functions on your system use ‘matherr’ when there is an error, then you should leave ‘TARGET_EDOM’ undefined so that ‘matherr’ is used normally. -- Macro: GEN_ERRNO_RTX Define this macro as a C expression to create an rtl expression that refers to the global "variable" ‘errno’. (On certain systems, ‘errno’ may not actually be a variable.) If you don't define this macro, a reasonable default is used. -- Target Hook: bool TARGET_LIBC_HAS_FUNCTION (enum function_class FN_CLASS, tree TYPE) This hook determines whether a function from a class of functions FN_CLASS is present in the target C library. If TYPE is NULL, the caller asks for support for all standard (float, double, long double) types. If TYPE is non-NULL, the caller asks for support for a specific type. -- Target Hook: bool TARGET_LIBC_HAS_FAST_FUNCTION (int FCODE) This hook determines whether a function from a class of functions ‘(enum function_class)’FCODE has a fast implementation. -- Target Hook: unsigned TARGET_FORTIFY_SOURCE_DEFAULT_LEVEL (void) This hook determines what value _FORTIFY_SOURCE will be set to when using the command-line option -fhardened. -- Target Hook: unsigned TARGET_LIBM_FUNCTION_MAX_ERROR (unsigned CFN, machine_mode MODE, bool BOUNDARY_P) This hook determines expected maximum errors for math functions measured in ulps (units of the last place). 0 means 0.5ulps precision (correctly rounded). ~0U means unknown errors. The ‘combined_fn’ CFN argument should identify just which math built-in function it is rather than its variant, MODE the variant in terms of floating-point machine mode. The hook should also take into account ‘flag_rounding_math’ whether it is maximum error just in default rounding mode, or in all possible rounding modes. BOUNDARY_P is ‘true’ for maximum errors on intrinsic math boundaries of functions rather than errors inside of the usual result ranges of the functions. E.g. the sin/cos function finite result is in between -1.0 and 1.0 inclusive, with BOUNDARY_P true the function returns how many ulps below or above those boundaries result could be. -- Macro: NEXT_OBJC_RUNTIME Set this macro to 1 to use the "NeXT" Objective-C message sending conventions by default. This calling convention involves passing the object, the selector and the method arguments all at once to the method-lookup library function. This is the usual setting when targeting Darwin / macOS systems, which have the NeXT runtime installed. If the macro is set to 0, the "GNU" Objective-C message sending convention will be used by default. This convention passes just the object and the selector to the method-lookup function, which returns a pointer to the method. In either case, it remains possible to select code-generation for the alternate scheme, by means of compiler command line switches.  File: gccint.info, Node: Addressing Modes, Next: Anchored Addresses, Prev: Library Calls, Up: Target Macros 18.13 Addressing Modes ====================== This is about addressing modes. -- Macro: HAVE_PRE_INCREMENT -- Macro: HAVE_PRE_DECREMENT -- Macro: HAVE_POST_INCREMENT -- Macro: HAVE_POST_DECREMENT A C expression that is nonzero if the machine supports pre-increment, pre-decrement, post-increment, or post-decrement addressing respectively. -- Macro: HAVE_PRE_MODIFY_DISP -- Macro: HAVE_POST_MODIFY_DISP A C expression that is nonzero if the machine supports pre- or post-address side-effect generation involving constants other than the size of the memory operand. -- Macro: HAVE_PRE_MODIFY_REG -- Macro: HAVE_POST_MODIFY_REG A C expression that is nonzero if the machine supports pre- or post-address side-effect generation involving a register displacement. -- Macro: CONSTANT_ADDRESS_P (X) A C expression that is 1 if the RTX X is a constant which is a valid address. On most machines the default definition of ‘(CONSTANT_P (X) && GET_CODE (X) != CONST_DOUBLE)’ is acceptable, but a few machines are more restrictive as to which constant addresses are supported. -- Macro: CONSTANT_P (X) ‘CONSTANT_P’, which is defined by target-independent code, accepts integer-values expressions whose values are not explicitly known, such as ‘symbol_ref’, ‘label_ref’, and ‘high’ expressions and ‘const’ arithmetic expressions, in addition to ‘const_int’ and ‘const_double’ expressions. -- Macro: MAX_REGS_PER_ADDRESS A number, the maximum number of registers that can appear in a valid memory address. Note that it is up to you to specify a value equal to the maximum number that ‘TARGET_LEGITIMATE_ADDRESS_P’ would ever accept. -- Target Hook: bool TARGET_LEGITIMATE_ADDRESS_P (machine_mode MODE, rtx X, bool STRICT, code_helper CH) A function that returns whether X (an RTX) is a legitimate memory address on the target machine for a memory operand of mode MODE. If CH is not ‘ERROR_MARK’, it can be called from middle-end to determine if it is valid to use X as a memory operand for RTX insn which is generated for the given code_helper CH. For example, assuming the given CH is IFN_LEN_LOAD, on some target its underlying hardware instructions support fewer addressing modes than what are for the normal vector load and store, then with this CH target can know the actual use context and return more exact result. Legitimate addresses are defined in two variants: a strict variant and a non-strict one. The STRICT parameter chooses which variant is desired by the caller. The strict variant is used in the reload pass. It must be defined so that any pseudo-register that has not been allocated a hard register is considered a memory reference. This is because in contexts where some kind of register is required, a pseudo-register with no hard register must be rejected. For non-hard registers, the strict variant should look up the ‘reg_renumber’ array; it should then proceed using the hard register number in the array, or treat the pseudo as a memory reference if the array holds ‘-1’. The non-strict variant is used in other passes. It must be defined to accept all pseudo-registers in every context where some kind of register is required. Normally, constant addresses which are the sum of a ‘symbol_ref’ and an integer are stored inside a ‘const’ RTX to mark them as constant. Therefore, there is no need to recognize such sums specifically as legitimate addresses. Normally you would simply recognize any ‘const’ as legitimate. Usually ‘PRINT_OPERAND_ADDRESS’ is not prepared to handle constant sums that are not marked with ‘const’. It assumes that a naked ‘plus’ indicates indexing. If so, then you _must_ reject such naked constant sums as illegitimate addresses, so that none of them will be given to ‘PRINT_OPERAND_ADDRESS’. On some machines, whether a symbolic address is legitimate depends on the section that the address refers to. On these machines, define the target hook ‘TARGET_ENCODE_SECTION_INFO’ to store the information into the ‘symbol_ref’, and then check for it here. When you see a ‘const’, you will have to look inside it to find the ‘symbol_ref’ in order to determine the section. *Note Assembler Format::. Some ports are still using a deprecated legacy substitute for this hook, the ‘GO_IF_LEGITIMATE_ADDRESS’ macro. This macro has this syntax: #define GO_IF_LEGITIMATE_ADDRESS (MODE, X, LABEL) and should ‘goto LABEL’ if the address X is a valid address on the target machine for a memory operand of mode MODE. Compiler source files that want to use the strict variant of this macro define the macro ‘REG_OK_STRICT’. You should use an ‘#ifdef REG_OK_STRICT’ conditional to define the strict variant in that case and the non-strict variant otherwise. Using the hook is usually simpler because it limits the number of files that are recompiled when changes are made. -- Macro: TARGET_MEM_CONSTRAINT A single character to be used instead of the default ‘'m'’ character for general memory addresses. This defines the constraint letter which matches the memory addresses accepted by ‘TARGET_LEGITIMATE_ADDRESS_P’. Define this macro if you want to support new address formats in your back end without changing the semantics of the ‘'m'’ constraint. This is necessary in order to preserve functionality of inline assembly constructs using the ‘'m'’ constraint. -- Macro: FIND_BASE_TERM (X) A C expression to determine the base term of address X, or to provide a simplified version of X from which ‘alias.cc’ can easily find the base term. This macro is used in only two places: ‘find_base_value’ and ‘find_base_term’ in ‘alias.cc’. It is always safe for this macro to not be defined. It exists so that alias analysis can understand machine-dependent addresses. The typical use of this macro is to handle addresses containing a label_ref or symbol_ref within an UNSPEC. -- Target Hook: rtx TARGET_LEGITIMIZE_ADDRESS (rtx X, rtx OLDX, machine_mode MODE) This hook is given an invalid memory address X for an operand of mode MODE and should try to return a valid memory address. X will always be the result of a call to ‘break_out_memory_refs’, and OLDX will be the operand that was given to that function to produce X. The code of the hook should not alter the substructure of X. If it transforms X into a more legitimate form, it should return the new X. It is not necessary for this hook to come up with a legitimate address, with the exception of native TLS addresses (*note Emulated TLS::). The compiler has standard ways of doing so in all cases. In fact, if the target supports only emulated TLS, it is safe to omit this hook or make it return X if it cannot find a valid way to legitimize the address. But often a machine-dependent strategy can generate better code. -- Macro: LEGITIMIZE_RELOAD_ADDRESS (X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) A C compound statement that attempts to replace X, which is an address that needs reloading, with a valid memory address for an operand of mode MODE. WIN will be a C statement label elsewhere in the code. It is not necessary to define this macro, but it might be useful for performance reasons. For example, on the i386, it is sometimes possible to use a single reload register instead of two by reloading a sum of two pseudo registers into a register. On the other hand, for number of RISC processors offsets are limited so that often an intermediate address needs to be generated in order to address a stack slot. By defining ‘LEGITIMIZE_RELOAD_ADDRESS’ appropriately, the intermediate addresses generated for adjacent some stack slots can be made identical, and thus be shared. _Note_: This macro should be used with caution. It is necessary to know something of how reload works in order to effectively use this, and it is quite easy to produce macros that build in too much knowledge of reload internals. _Note_: This macro must be able to reload an address created by a previous invocation of this macro. If it fails to handle such addresses then the compiler may generate incorrect code or abort. The macro definition should use ‘push_reload’ to indicate parts that need reloading; OPNUM, TYPE and IND_LEVELS are usually suitable to be passed unaltered to ‘push_reload’. The code generated by this macro must not alter the substructure of X. If it transforms X into a more legitimate form, it should assign X (which will always be a C variable) a new value. This also applies to parts that you change indirectly by calling ‘push_reload’. The macro definition may use ‘strict_memory_address_p’ to test if the address has become legitimate. If you want to change only a part of X, one standard way of doing this is to use ‘copy_rtx’. Note, however, that it unshares only a single level of rtl. Thus, if the part to be changed is not at the top level, you'll need to replace first the top level. It is not necessary for this macro to come up with a legitimate address; but often a machine-dependent strategy can generate better code. -- Target Hook: bool TARGET_MODE_DEPENDENT_ADDRESS_P (const_rtx ADDR, addr_space_t ADDRSPACE) This hook returns ‘true’ if memory address ADDR in address space ADDRSPACE can have different meanings depending on the machine mode of the memory reference it is used for or if the address is valid for some modes but not others. Autoincrement and autodecrement addresses typically have mode-dependent effects because the amount of the increment or decrement is the size of the operand being addressed. Some machines have other mode-dependent addresses. Many RISC machines have no mode-dependent addresses. You may assume that ADDR is a valid address for the machine. The default version of this hook returns ‘false’. -- Target Hook: bool TARGET_LEGITIMATE_CONSTANT_P (machine_mode MODE, rtx X) This hook returns true if X is a legitimate constant for a MODE-mode immediate operand on the target machine. You can assume that X satisfies ‘CONSTANT_P’, so you need not check this. The default definition returns true. -- Target Hook: bool TARGET_PRECOMPUTE_TLS_P (machine_mode MODE, rtx X) This hook returns true if X is a TLS operand on the target machine that should be pre-computed when used as the argument in a call. You can assume that X satisfies ‘CONSTANT_P’, so you need not check this. The default definition returns false. -- Target Hook: rtx TARGET_DELEGITIMIZE_ADDRESS (rtx X) This hook is used to undo the possibly obfuscating effects of the ‘LEGITIMIZE_ADDRESS’ and ‘LEGITIMIZE_RELOAD_ADDRESS’ target macros. Some backend implementations of these macros wrap symbol references inside an ‘UNSPEC’ rtx to represent PIC or similar addressing modes. This target hook allows GCC's optimizers to understand the semantics of these opaque ‘UNSPEC’s by converting them back into their original form. -- Target Hook: bool TARGET_CONST_NOT_OK_FOR_DEBUG_P (rtx X) This hook should return true if X should not be emitted into debug sections. -- Target Hook: bool TARGET_CANNOT_FORCE_CONST_MEM (machine_mode MODE, rtx X) This hook should return true if X is of a form that cannot (or should not) be spilled to the constant pool. MODE is the mode of X. The default version of this hook returns false. The primary reason to define this hook is to prevent reload from deciding that a non-legitimate constant would be better reloaded from the constant pool instead of spilling and reloading a register holding the constant. This restriction is often true of addresses of TLS symbols for various targets. -- Target Hook: bool TARGET_USE_BLOCKS_FOR_CONSTANT_P (machine_mode MODE, const_rtx X) This hook should return true if pool entries for constant X can be placed in an ‘object_block’ structure. MODE is the mode of X. The default version returns false for all constants. -- Target Hook: bool TARGET_USE_BLOCKS_FOR_DECL_P (const_tree DECL) This hook should return true if pool entries for DECL should be placed in an ‘object_block’ structure. The default version returns true for all decls. -- Target Hook: tree TARGET_BUILTIN_RECIPROCAL (tree FNDECL) This hook should return the DECL of a function that implements the reciprocal of the machine-specific builtin function FNDECL, or ‘NULL_TREE’ if such a function is not available. -- Target Hook: tree TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD (void) This hook should return the DECL of a function F that given an address ADDR as an argument returns a mask M that can be used to extract from two vectors the relevant data that resides in ADDR in case ADDR is not properly aligned. The autovectorizer, when vectorizing a load operation from an address ADDR that may be unaligned, will generate two vector loads from the two aligned addresses around ADDR. It then generates a ‘REALIGN_LOAD’ operation to extract the relevant data from the two loaded vectors. The first two arguments to ‘REALIGN_LOAD’, V1 and V2, are the two vectors, each of size VS, and the third argument, OFF, defines how the data will be extracted from these two vectors: if OFF is 0, then the returned vector is V2; otherwise, the returned vector is composed from the last VS-OFF elements of V1 concatenated to the first OFF elements of V2. If this hook is defined, the autovectorizer will generate a call to F (using the DECL tree that this hook returns) and will use the return value of F as the argument OFF to ‘REALIGN_LOAD’. Therefore, the mask M returned by F should comply with the semantics expected by ‘REALIGN_LOAD’ described above. If this hook is not defined, then ADDR will be used as the argument OFF to ‘REALIGN_LOAD’, in which case the low log2(VS) − 1 bits of ADDR will be considered. -- Target Hook: int TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST (enum vect_cost_for_stmt TYPE_OF_COST, tree VECTYPE, int MISALIGN) Returns cost of different scalar or vector statements for vectorization cost model. For vector memory operations the cost may depend on type (VECTYPE) and misalignment value (MISALIGN). -- Target Hook: poly_uint64 TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT (const_tree TYPE) This hook returns the preferred alignment in bits for accesses to vectors of type TYPE in vectorized code. This might be less than or greater than the ABI-defined value returned by ‘TARGET_VECTOR_ALIGNMENT’. It can be equal to the alignment of a single element, in which case the vectorizer will not try to optimize for alignment. The default hook returns ‘TYPE_ALIGN (TYPE)’, which is correct for most targets. -- Target Hook: bool TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE (const_tree TYPE, bool IS_PACKED) Return true if vector alignment is reachable (by peeling N iterations) for the given scalar type TYPE. IS_PACKED is false if the scalar access using TYPE is known to be naturally aligned. -- Target Hook: bool TARGET_VECTORIZE_VEC_PERM_CONST (machine_mode MODE, machine_mode OP_MODE, rtx OUTPUT, rtx IN0, rtx IN1, const vec_perm_indices &SEL) This hook is used to test whether the target can permute up to two vectors of mode OP_MODE using the permutation vector ‘sel’, producing a vector of mode MODE. The hook is also used to emit such a permutation. When the hook is being used to test whether the target supports a permutation, IN0, IN1, and OUT are all null. When the hook is being used to emit a permutation, IN0 and IN1 are the source vectors of mode OP_MODE and OUT is the destination vector of mode MODE. IN1 is the same as IN0 if SEL describes a permutation on one vector instead of two. Return true if the operation is possible, emitting instructions for it if rtxes are provided. If the hook returns false for a mode with multibyte elements, GCC will try the equivalent byte operation. If that also fails, it will try forcing the selector into a register and using the VEC_PERMMODE instruction pattern. There is no need for the hook to handle these two implementation approaches itself. -- Target Hook: bool TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT (const_tree TYPE) Sometimes it is possible to implement a vector division using a sequence of two addition-shift pairs, giving four instructions in total. Return true if taking this approach for VECTYPE is likely to be better than using a sequence involving highpart multiplication. Default is false if ‘can_mult_highpart_p’, otherwise true. -- Target Hook: tree TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION (unsigned CODE, tree VEC_TYPE_OUT, tree VEC_TYPE_IN) This hook should return the decl of a function that implements the vectorized variant of the function with the ‘combined_fn’ code CODE or ‘NULL_TREE’ if such a function is not available. The return type of the vectorized function shall be of vector type VEC_TYPE_OUT and the argument types should be VEC_TYPE_IN. -- Target Hook: tree TARGET_VECTORIZE_BUILTIN_MD_VECTORIZED_FUNCTION (tree FNDECL, tree VEC_TYPE_OUT, tree VEC_TYPE_IN) This hook should return the decl of a function that implements the vectorized variant of target built-in function ‘fndecl’. The return type of the vectorized function shall be of vector type VEC_TYPE_OUT and the argument types should be VEC_TYPE_IN. -- Target Hook: bool TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT (machine_mode MODE, const_tree TYPE, int MISALIGNMENT, bool IS_PACKED) This hook should return true if the target supports misaligned vector store/load of a specific factor denoted in the MISALIGNMENT parameter. The vector store/load should be of machine mode MODE and the elements in the vectors should be of type TYPE. IS_PACKED parameter is true if the memory access is defined in a packed struct. -- Target Hook: machine_mode TARGET_VECTORIZE_PREFERRED_SIMD_MODE (scalar_mode MODE) This hook should return the preferred mode for vectorizing scalar mode MODE. The default is equal to ‘word_mode’, because the vectorizer can do some transformations even in absence of specialized SIMD hardware. -- Target Hook: machine_mode TARGET_VECTORIZE_SPLIT_REDUCTION (machine_mode) This hook should return the preferred mode to split the final reduction step on MODE to. The reduction is then carried out reducing upper against lower halves of vectors recursively until the specified mode is reached. The default is MODE which means no splitting. -- Target Hook: unsigned int TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES (vector_modes *MODES, bool ALL) If using the mode returned by ‘TARGET_VECTORIZE_PREFERRED_SIMD_MODE’ is not the only approach worth considering, this hook should add one mode to MODES for each useful alternative approach. These modes are then passed to ‘TARGET_VECTORIZE_RELATED_MODE’ to obtain the vector mode for a given element mode. The modes returned in MODES should use the smallest element mode possible for the vectorization approach that they represent, preferring integer modes over floating-poing modes in the event of a tie. The first mode should be the ‘TARGET_VECTORIZE_PREFERRED_SIMD_MODE’ for its element mode. If ALL is true, add suitable vector modes even when they are generally not expected to be worthwhile. The hook returns a bitmask of flags that control how the modes in MODES are used. The flags are: ‘VECT_COMPARE_COSTS’ Tells the loop vectorizer to try all the provided modes and pick the one with the lowest cost. By default the vectorizer will choose the first mode that works. The hook does not need to do anything if the vector returned by ‘TARGET_VECTORIZE_PREFERRED_SIMD_MODE’ is the only one relevant for autovectorization. The default implementation adds no modes and returns 0. -- Target Hook: opt_machine_mode TARGET_VECTORIZE_RELATED_MODE (machine_mode VECTOR_MODE, scalar_mode ELEMENT_MODE, poly_uint64 NUNITS) If a piece of code is using vector mode VECTOR_MODE and also wants to operate on elements of mode ELEMENT_MODE, return the vector mode it should use for those elements. If NUNITS is nonzero, ensure that the mode has exactly NUNITS elements, otherwise pick whichever vector size pairs the most naturally with VECTOR_MODE. Return an empty ‘opt_machine_mode’ if there is no supported vector mode with the required properties. There is no prescribed way of handling the case in which NUNITS is zero. One common choice is to pick a vector mode with the same size as VECTOR_MODE; this is the natural choice if the target has a fixed vector size. Another option is to choose a vector mode with the same number of elements as VECTOR_MODE; this is the natural choice if the target has a fixed number of elements. Alternatively, the hook might choose a middle ground, such as trying to keep the number of elements as similar as possible while applying maximum and minimum vector sizes. The default implementation uses ‘mode_for_vector’ to find the requested mode, returning a mode with the same size as VECTOR_MODE when NUNITS is zero. This is the correct behavior for most targets. -- Target Hook: opt_machine_mode TARGET_VECTORIZE_GET_MASK_MODE (machine_mode MODE) Return the mode to use for a vector mask that holds one boolean result for each element of vector mode MODE. The returned mask mode can be a vector of integers (class ‘MODE_VECTOR_INT’), a vector of booleans (class ‘MODE_VECTOR_BOOL’) or a scalar integer (class ‘MODE_INT’). Return an empty ‘opt_machine_mode’ if no such mask mode exists. The default implementation returns a ‘MODE_VECTOR_INT’ with the same size and number of elements as MODE, if such a mode exists. -- Target Hook: bool TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE (unsigned IFN) This hook returns true if masked internal function IFN (really of type ‘internal_fn’) should be considered expensive when the mask is all zeros. GCC can then try to branch around the instruction instead. -- Target Hook: class vector_costs * TARGET_VECTORIZE_CREATE_COSTS (vec_info *VINFO, bool COSTING_FOR_SCALAR) This hook should initialize target-specific data structures in preparation for modeling the costs of vectorizing a loop or basic block. The default allocates three unsigned integers for accumulating costs for the prologue, body, and epilogue of the loop or basic block. If LOOP_INFO is non-NULL, it identifies the loop being vectorized; otherwise a single block is being vectorized. If COSTING_FOR_SCALAR is true, it indicates the current cost model is for the scalar version of a loop or block; otherwise it is for the vector version. -- Target Hook: tree TARGET_VECTORIZE_BUILTIN_GATHER (const_tree MEM_VECTYPE, const_tree INDEX_TYPE, int SCALE) Target builtin that implements vector gather operation. MEM_VECTYPE is the vector type of the load and INDEX_TYPE is scalar type of the index, scaled by SCALE. The default is ‘NULL_TREE’ which means to not vectorize gather loads. -- Target Hook: tree TARGET_VECTORIZE_BUILTIN_SCATTER (const_tree VECTYPE, const_tree INDEX_TYPE, int SCALE) Target builtin that implements vector scatter operation. VECTYPE is the vector type of the store and INDEX_TYPE is scalar type of the index, scaled by SCALE. The default is ‘NULL_TREE’ which means to not vectorize scatter stores. -- Target Hook: int TARGET_SIMD_CLONE_COMPUTE_VECSIZE_AND_SIMDLEN (struct cgraph_node *, struct cgraph_simd_clone *, TREE, INT, BOOL) This hook should set VECSIZE_MANGLE, VECSIZE_INT, VECSIZE_FLOAT fields in SIMD_CLONE structure pointed by CLONE_INFO argument and also SIMDLEN field if it was previously 0. VECSIZE_MANGLE is a marker for the backend only. VECSIZE_INT and VECSIZE_FLOAT should be left zero on targets where the number of lanes is not determined by the bitsize (in which case SIMDLEN is always used). The hook should return 0 if SIMD clones shouldn't be emitted, or number of VECSIZE_MANGLE variants that should be emitted. -- Target Hook: void TARGET_SIMD_CLONE_ADJUST (struct cgraph_node *) This hook should add implicit ‘attribute(target("..."))’ attribute to SIMD clone NODE if needed. -- Target Hook: int TARGET_SIMD_CLONE_USABLE (struct cgraph_node *) This hook should return -1 if SIMD clone NODE shouldn't be used in vectorized loops in current function, or non-negative number if it is usable. In that case, the smaller the number is, the more desirable it is to use it. -- Target Hook: int TARGET_SIMT_VF (void) Return number of threads in SIMT thread group on the target. -- Target Hook: int TARGET_OMP_DEVICE_KIND_ARCH_ISA (enum omp_device_kind_arch_isa TRAIT, const char *NAME) Return 1 if TRAIT NAME is present in the OpenMP context's device trait set, return 0 if not present in any OpenMP context in the whole translation unit, or -1 if not present in the current OpenMP context but might be present in another OpenMP context in the same TU. -- Target Hook: bool TARGET_GOACC_VALIDATE_DIMS (tree DECL, int *DIMS, int FN_LEVEL, unsigned USED) This hook should check the launch dimensions provided for an OpenACC compute region, or routine. Defaulted values are represented as -1 and non-constant values as 0. The FN_LEVEL is negative for the function corresponding to the compute region. For a routine it is the outermost level at which partitioned execution may be spawned. The hook should verify non-default values. If DECL is NULL, global defaults are being validated and unspecified defaults should be filled in. Diagnostics should be issued as appropriate. Return true, if changes have been made. You must override this hook to provide dimensions larger than 1. -- Target Hook: int TARGET_GOACC_DIM_LIMIT (int AXIS) This hook should return the maximum size of a particular dimension, or zero if unbounded. -- Target Hook: bool TARGET_GOACC_FORK_JOIN (gcall *CALL, const int *DIMS, bool IS_FORK) This hook can be used to convert IFN_GOACC_FORK and IFN_GOACC_JOIN function calls to target-specific gimple, or indicate whether they should be retained. It is executed during the oacc_device_lower pass. It should return true, if the call should be retained. It should return false, if it is to be deleted (either because target-specific gimple has been inserted before it, or there is no need for it). The default hook returns false, if there are no RTL expanders for them. -- Target Hook: void TARGET_GOACC_REDUCTION (gcall *CALL) This hook is used by the oacc_transform pass to expand calls to the GOACC_REDUCTION internal function, into a sequence of gimple instructions. CALL is gimple statement containing the call to the function. This hook removes statement CALL after the expanded sequence has been inserted. This hook is also responsible for allocating any storage for reductions when necessary. -- Target Hook: tree TARGET_PREFERRED_ELSE_VALUE (unsigned IFN, tree TYPE, unsigned NOPS, tree *OPS) This hook returns the target's preferred final argument for a call to conditional internal function IFN (really of type ‘internal_fn’). TYPE specifies the return type of the function and OPS are the operands to the conditional operation, of which there are NOPS. For example, if IFN is ‘IFN_COND_ADD’, the hook returns a value of type TYPE that should be used when ‘OPS[0]’ and ‘OPS[1]’ are conditionally added together. This hook is only relevant if the target supports conditional patterns like ‘cond_addM’. The default implementation returns a zero constant of type TYPE. -- Target Hook: tree TARGET_GOACC_ADJUST_PRIVATE_DECL (location_t LOC, tree VAR, int LEVEL) This hook, if defined, is used by accelerator target back-ends to adjust OpenACC variable declarations that should be made private to the given parallelism level (i.e. ‘GOMP_DIM_GANG’, ‘GOMP_DIM_WORKER’ or ‘GOMP_DIM_VECTOR’). A typical use for this hook is to force variable declarations at the ‘gang’ level to reside in GPU shared memory. LOC may be used for diagnostic purposes. You may also use the ‘TARGET_GOACC_EXPAND_VAR_DECL’ hook if the adjusted variable declaration needs to be expanded to RTL in a non-standard way. -- Target Hook: rtx TARGET_GOACC_EXPAND_VAR_DECL (tree VAR) This hook, if defined, is used by accelerator target back-ends to expand specially handled kinds of ‘VAR_DECL’ expressions. A particular use is to place variables with specific attributes inside special accelarator memories. A return value of ‘NULL’ indicates that the target does not handle this ‘VAR_DECL’, and normal RTL expanding is resumed. Only define this hook if your accelerator target needs to expand certain ‘VAR_DECL’ nodes in a way that differs from the default. You can also adjust private variables at OpenACC device-lowering time using the ‘TARGET_GOACC_ADJUST_PRIVATE_DECL’ target hook. -- Target Hook: tree TARGET_GOACC_CREATE_WORKER_BROADCAST_RECORD (tree REC, bool SENDER, const char *NAME, unsigned HOST_WIDE_INT OFFSET) Create a record used to propagate local-variable state from an active worker to other workers. A possible implementation might adjust the type of REC to place the new variable in shared GPU memory. Presence of this target hook indicates that middle end neutering/broadcasting be used. -- Target Hook: void TARGET_GOACC_SHARED_MEM_LAYOUT (unsigned HOST_WIDE_INT *, unsigned HOST_WIDE_INT *, INT[], unsigned HOST_WIDE_INT[], unsigned HOST_WIDE_INT[]) Lay out a fixed shared-memory region on the target. The LO and HI arguments should be set to a range of addresses that can be used for worker broadcasting. The dimensions, reduction size and gang-private size arguments are for the current offload region.  File: gccint.info, Node: Anchored Addresses, Next: Condition Code, Prev: Addressing Modes, Up: Target Macros 18.14 Anchored Addresses ======================== GCC usually addresses every static object as a separate entity. For example, if we have: static int a, b, c; int foo (void) { return a + b + c; } the code for ‘foo’ will usually calculate three separate symbolic addresses: those of ‘a’, ‘b’ and ‘c’. On some targets, it would be better to calculate just one symbolic address and access the three variables relative to it. The equivalent pseudocode would be something like: int foo (void) { register int *xr = &x; return xr[&a - &x] + xr[&b - &x] + xr[&c - &x]; } (which isn't valid C). We refer to shared addresses like ‘x’ as "section anchors". Their use is controlled by ‘-fsection-anchors’. The hooks below describe the target properties that GCC needs to know in order to make effective use of section anchors. It won't use section anchors at all unless either ‘TARGET_MIN_ANCHOR_OFFSET’ or ‘TARGET_MAX_ANCHOR_OFFSET’ is set to a nonzero value. -- Target Hook: HOST_WIDE_INT TARGET_MIN_ANCHOR_OFFSET The minimum offset that should be applied to a section anchor. On most targets, it should be the smallest offset that can be applied to a base register while still giving a legitimate address for every mode. The default value is 0. -- Target Hook: HOST_WIDE_INT TARGET_MAX_ANCHOR_OFFSET Like ‘TARGET_MIN_ANCHOR_OFFSET’, but the maximum (inclusive) offset that should be applied to section anchors. The default value is 0. -- Target Hook: void TARGET_ASM_OUTPUT_ANCHOR (rtx X) Write the assembly code to define section anchor X, which is a ‘SYMBOL_REF’ for which ‘SYMBOL_REF_ANCHOR_P (X)’ is true. The hook is called with the assembly output position set to the beginning of ‘SYMBOL_REF_BLOCK (X)’. If ‘ASM_OUTPUT_DEF’ is available, the hook's default definition uses it to define the symbol as ‘. + SYMBOL_REF_BLOCK_OFFSET (X)’. If ‘ASM_OUTPUT_DEF’ is not available, the hook's default definition is ‘NULL’, which disables the use of section anchors altogether. -- Target Hook: bool TARGET_USE_ANCHORS_FOR_SYMBOL_P (const_rtx X) Return true if GCC should attempt to use anchors to access ‘SYMBOL_REF’ X. You can assume ‘SYMBOL_REF_HAS_BLOCK_INFO_P (X)’ and ‘!SYMBOL_REF_ANCHOR_P (X)’. The default version is correct for most targets, but you might need to intercept this hook to handle things like target-specific attributes or target-specific sections.  File: gccint.info, Node: Condition Code, Next: Costs, Prev: Anchored Addresses, Up: Target Macros 18.15 Condition Code Status =========================== Condition codes in GCC are represented as registers, which provides better schedulability for architectures that do have a condition code register, but on which most instructions do not affect it. The latter category includes most RISC machines. Implicit clobbering would pose a strong restriction on the placement of the definition and use of the condition code. In the past the definition and use were always adjacent. However, recent changes to support trapping arithmetic may result in the definition and user being in different blocks. Thus, there may be a ‘NOTE_INSN_BASIC_BLOCK’ between them. Additionally, the definition may be the source of exception handling edges. These restrictions can prevent important optimizations on some machines. For example, on the IBM RS/6000, there is a delay for taken branches unless the condition code register is set three instructions earlier than the conditional branch. The instruction scheduler cannot perform this optimization if it is not permitted to separate the definition and use of the condition code register. If there is a specific condition code register in the machine, use a hard register. If the condition code or comparison result can be placed in any general register, or if there are multiple condition registers, use a pseudo register. Registers used to store the condition code value will usually have a mode that is in class ‘MODE_CC’. Alternatively, you can use ‘BImode’ if the comparison operator is specified already in the compare instruction. In this case, you are not interested in most macros in this section. * Menu: * MODE_CC Condition Codes:: Modern representation of condition codes.  File: gccint.info, Node: MODE_CC Condition Codes, Up: Condition Code 18.15.1 Representation of condition codes using registers --------------------------------------------------------- -- Macro: SELECT_CC_MODE (OP, X, Y) On many machines, the condition code may be produced by other instructions than compares, for example the branch can use directly the condition code set by a subtract instruction. However, on some machines when the condition code is set this way some bits (such as the overflow bit) are not set in the same way as a test instruction, so that a different branch instruction must be used for some conditional branches. When this happens, use the machine mode of the condition code register to record different formats of the condition code register. Modes can also be used to record which compare instruction (e.g. a signed or an unsigned comparison) produced the condition codes. If other modes than ‘CCmode’ are required, add them to ‘MACHINE-modes.def’ and define ‘SELECT_CC_MODE’ to choose a mode given an operand of a compare. This is needed because the modes have to be chosen not only during RTL generation but also, for example, by instruction combination. The result of ‘SELECT_CC_MODE’ should be consistent with the mode used in the patterns; for example to support the case of the add on the SPARC discussed above, we have the pattern (define_insn "" [(set (reg:CCNZ 0) (compare:CCNZ (plus:SI (match_operand:SI 0 "register_operand" "%r") (match_operand:SI 1 "arith_operand" "rI")) (const_int 0)))] "" "...") together with a ‘SELECT_CC_MODE’ that returns ‘CCNZmode’ for comparisons whose argument is a ‘plus’: #define SELECT_CC_MODE(OP,X,Y) \ (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ ? ((OP == LT || OP == LE || OP == GT || OP == GE) \ ? CCFPEmode : CCFPmode) \ : ((GET_CODE (X) == PLUS || GET_CODE (X) == MINUS \ || GET_CODE (X) == NEG || GET_CODE (x) == ASHIFT) \ ? CCNZmode : CCmode)) Another reason to use modes is to retain information on which operands were used by the comparison; see ‘REVERSIBLE_CC_MODE’ later in this section. You should define this macro if and only if you define extra CC modes in ‘MACHINE-modes.def’. -- Target Hook: void TARGET_CANONICALIZE_COMPARISON (int *CODE, rtx *OP0, rtx *OP1, bool OP0_PRESERVE_VALUE) On some machines not all possible comparisons are defined, but you can convert an invalid comparison into a valid one. For example, the Alpha does not have a ‘GT’ comparison, but you can use an ‘LT’ comparison instead and swap the order of the operands. On such machines, implement this hook to do any required conversions. CODE is the initial comparison code and OP0 and OP1 are the left and right operands of the comparison, respectively. If OP0_PRESERVE_VALUE is ‘true’ the implementation is not allowed to change the value of OP0 since the value might be used in RTXs which aren't comparisons. E.g. the implementation is not allowed to swap operands in that case. GCC will not assume that the comparison resulting from this macro is valid but will see if the resulting insn matches a pattern in the ‘md’ file. You need not to implement this hook if it would never change the comparison code or operands. -- Macro: REVERSIBLE_CC_MODE (MODE) A C expression whose value is one if it is always safe to reverse a comparison whose mode is MODE. If ‘SELECT_CC_MODE’ can ever return MODE for a floating-point inequality comparison, then ‘REVERSIBLE_CC_MODE (MODE)’ must be zero. You need not define this macro if it would always returns zero or if the floating-point format is anything other than ‘IEEE_FLOAT_FORMAT’. For example, here is the definition used on the SPARC, where floating-point inequality comparisons are given either ‘CCFPEmode’ or ‘CCFPmode’: #define REVERSIBLE_CC_MODE(MODE) \ ((MODE) != CCFPEmode && (MODE) != CCFPmode) -- Macro: REVERSE_CONDITION (CODE, MODE) A C expression whose value is reversed condition code of the CODE for comparison done in CC_MODE MODE. The macro is used only in case ‘REVERSIBLE_CC_MODE (MODE)’ is nonzero. Define this macro in case machine has some non-standard way how to reverse certain conditionals. For instance in case all floating point conditions are non-trapping, compiler may freely convert unordered compares to ordered ones. Then definition may look like: #define REVERSE_CONDITION(CODE, MODE) \ ((MODE) != CCFPmode ? reverse_condition (CODE) \ : reverse_condition_maybe_unordered (CODE)) -- Target Hook: bool TARGET_FIXED_CONDITION_CODE_REGS (unsigned int *P1, unsigned int *P2) On targets which use a hard register rather than a pseudo-register to hold condition codes, the regular CSE passes are often not able to identify cases in which the hard register is set to a common value. Use this hook to enable a small pass which optimizes such cases. This hook should return true to enable this pass, and it should set the integers to which its arguments point to the hard register numbers used for condition codes. When there is only one such register, as is true on most systems, the integer pointed to by P2 should be set to ‘INVALID_REGNUM’. The default version of this hook returns false. -- Target Hook: machine_mode TARGET_CC_MODES_COMPATIBLE (machine_mode M1, machine_mode M2) On targets which use multiple condition code modes in class ‘MODE_CC’, it is sometimes the case that a comparison can be validly done in more than one mode. On such a system, define this target hook to take two mode arguments and to return a mode in which both comparisons may be validly done. If there is no such mode, return ‘VOIDmode’. The default version of this hook checks whether the modes are the same. If they are, it returns that mode. If they are different, it returns ‘VOIDmode’. -- Target Hook: unsigned int TARGET_FLAGS_REGNUM If the target has a dedicated flags register, and it needs to use the post-reload comparison elimination pass, or the delay slot filler pass, then this value should be set appropriately.  File: gccint.info, Node: Costs, Next: Scheduling, Prev: Condition Code, Up: Target Macros 18.16 Describing Relative Costs of Operations ============================================= These macros let you describe the relative speed of various operations on the target machine. -- Macro: REGISTER_MOVE_COST (MODE, FROM, TO) A C expression for the cost of moving data of mode MODE from a register in class FROM to one in class TO. The classes are expressed using the enumeration values such as ‘GENERAL_REGS’. A value of 2 is the default; other values are interpreted relative to that. It is not required that the cost always equal 2 when FROM is the same as TO; on some machines it is expensive to move between registers if they are not general registers. If reload sees an insn consisting of a single ‘set’ between two hard registers, and if ‘REGISTER_MOVE_COST’ applied to their classes returns a value of 2, reload does not check to ensure that the constraints of the insn are met. Setting a cost of other than 2 will allow reload to verify that the constraints are met. You should do this if the ‘movM’ pattern's constraints do not allow such copying. These macros are obsolete, new ports should use the target hook ‘TARGET_REGISTER_MOVE_COST’ instead. -- Target Hook: int TARGET_REGISTER_MOVE_COST (machine_mode MODE, reg_class_t FROM, reg_class_t TO) This target hook should return the cost of moving data of mode MODE from a register in class FROM to one in class TO. The classes are expressed using the enumeration values such as ‘GENERAL_REGS’. A value of 2 is the default; other values are interpreted relative to that. It is not required that the cost always equal 2 when FROM is the same as TO; on some machines it is expensive to move between registers if they are not general registers. If reload sees an insn consisting of a single ‘set’ between two hard registers, and if ‘TARGET_REGISTER_MOVE_COST’ applied to their classes returns a value of 2, reload does not check to ensure that the constraints of the insn are met. Setting a cost of other than 2 will allow reload to verify that the constraints are met. You should do this if the ‘movM’ pattern's constraints do not allow such copying. The default version of this function returns 2. -- Macro: MEMORY_MOVE_COST (MODE, CLASS, IN) A C expression for the cost of moving data of mode MODE between a register of class CLASS and memory; IN is zero if the value is to be written to memory, nonzero if it is to be read in. This cost is relative to those in ‘REGISTER_MOVE_COST’. If moving between registers and memory is more expensive than between two registers, you should define this macro to express the relative cost. If you do not define this macro, GCC uses a default cost of 4 plus the cost of copying via a secondary reload register, if one is needed. If your machine requires a secondary reload register to copy between memory and a register of CLASS but the reload mechanism is more complex than copying via an intermediate, define this macro to reflect the actual cost of the move. GCC defines the function ‘memory_move_secondary_cost’ if secondary reloads are needed. It computes the costs due to copying via a secondary register. If your machine copies from memory using a secondary register in the conventional way but the default base value of 4 is not correct for your machine, define this macro to add some other value to the result of that function. The arguments to that function are the same as to this macro. These macros are obsolete, new ports should use the target hook ‘TARGET_MEMORY_MOVE_COST’ instead. -- Target Hook: int TARGET_MEMORY_MOVE_COST (machine_mode MODE, reg_class_t RCLASS, bool IN) This target hook should return the cost of moving data of mode MODE between a register of class RCLASS and memory; IN is ‘false’ if the value is to be written to memory, ‘true’ if it is to be read in. This cost is relative to those in ‘TARGET_REGISTER_MOVE_COST’. If moving between registers and memory is more expensive than between two registers, you should add this target hook to express the relative cost. If you do not add this target hook, GCC uses a default cost of 4 plus the cost of copying via a secondary reload register, if one is needed. If your machine requires a secondary reload register to copy between memory and a register of RCLASS but the reload mechanism is more complex than copying via an intermediate, use this target hook to reflect the actual cost of the move. GCC defines the function ‘memory_move_secondary_cost’ if secondary reloads are needed. It computes the costs due to copying via a secondary register. If your machine copies from memory using a secondary register in the conventional way but the default base value of 4 is not correct for your machine, use this target hook to add some other value to the result of that function. The arguments to that function are the same as to this target hook. -- Macro: BRANCH_COST (SPEED_P, PREDICTABLE_P) A C expression for the cost of a branch instruction. A value of 1 is the default; other values are interpreted relative to that. Parameter SPEED_P is true when the branch in question should be optimized for speed. When it is false, ‘BRANCH_COST’ should return a value optimal for code size rather than performance. PREDICTABLE_P is true for well-predicted branches. On many architectures the ‘BRANCH_COST’ can be reduced then. Here are additional macros which do not specify precise relative costs, but only that certain actions are more expensive than GCC would ordinarily expect. -- Macro: SLOW_BYTE_ACCESS Define this macro as a C expression which is nonzero if accessing less than a word of memory (i.e. a ‘char’ or a ‘short’) is no faster than accessing a word of memory, i.e., if such access require more than one instruction or if there is no difference in cost between byte and (aligned) word loads. When this macro is not defined, the compiler will access a field by finding the smallest containing object; when it is defined, a fullword load will be used if alignment permits. Unless bytes accesses are faster than word accesses, using word accesses is preferable since it may eliminate subsequent memory access if subsequent accesses occur to other fields in the same word of the structure, but to different bytes. -- Target Hook: bool TARGET_SLOW_UNALIGNED_ACCESS (machine_mode MODE, unsigned int ALIGN) This hook returns true if memory accesses described by the MODE and ALIGNMENT parameters have a cost many times greater than aligned accesses, for example if they are emulated in a trap handler. This hook is invoked only for unaligned accesses, i.e. when ‘ALIGNMENT < GET_MODE_ALIGNMENT (MODE)’. When this hook returns true, the compiler will act as if ‘STRICT_ALIGNMENT’ were true when generating code for block moves. This can cause significantly more instructions to be produced. Therefore, do not make this hook return true if unaligned accesses only add a cycle or two to the time for a memory access. The hook must return true whenever ‘STRICT_ALIGNMENT’ is true. The default implementation returns ‘STRICT_ALIGNMENT’. -- Macro: MOVE_RATIO (SPEED) The threshold of number of scalar memory-to-memory move insns, _below_ which a sequence of insns should be generated instead of a string move insn or a library call. Increasing the value will always make code faster, but eventually incurs high cost in increased code size. Note that on machines where the corresponding move insn is a ‘define_expand’ that emits a sequence of insns, this macro counts the number of such sequences. The parameter SPEED is true if the code is currently being optimized for speed rather than size. If you don't define this, a reasonable default is used. -- Target Hook: bool TARGET_USE_BY_PIECES_INFRASTRUCTURE_P (unsigned HOST_WIDE_INT SIZE, unsigned int ALIGNMENT, enum by_pieces_operation OP, bool SPEED_P) GCC will attempt several strategies when asked to copy between two areas of memory, or to set, clear or store to memory, for example when copying a ‘struct’. The ‘by_pieces’ infrastructure implements such memory operations as a sequence of load, store or move insns. Alternate strategies are to expand the ‘cpymem’ or ‘setmem’ optabs, to emit a library call, or to emit unit-by-unit, loop-based operations. This target hook should return true if, for a memory operation with a given SIZE and ALIGNMENT, using the ‘by_pieces’ infrastructure is expected to result in better code generation. Both SIZE and ALIGNMENT are measured in terms of storage units. The parameter OP is one of: ‘CLEAR_BY_PIECES’, ‘MOVE_BY_PIECES’, ‘SET_BY_PIECES’, ‘STORE_BY_PIECES’ or ‘COMPARE_BY_PIECES’. These describe the type of memory operation under consideration. The parameter SPEED_P is true if the code is currently being optimized for speed rather than size. Returning true for higher values of SIZE can improve code generation for speed if the target does not provide an implementation of the ‘cpymem’ or ‘setmem’ standard names, if the ‘cpymem’ or ‘setmem’ implementation would be more expensive than a sequence of insns, or if the overhead of a library call would dominate that of the body of the memory operation. Returning true for higher values of ‘size’ may also cause an increase in code size, for example where the number of insns emitted to perform a move would be greater than that of a library call. -- Target Hook: bool TARGET_OVERLAP_OP_BY_PIECES_P (void) This target hook should return true if when the ‘by_pieces’ infrastructure is used, an offset adjusted unaligned memory operation in the smallest integer mode for the last piece operation of a memory region can be generated to avoid doing more than one smaller operations. -- Target Hook: int TARGET_COMPARE_BY_PIECES_BRANCH_RATIO (machine_mode MODE) When expanding a block comparison in MODE, gcc can try to reduce the number of branches at the expense of more memory operations. This hook allows the target to override the default choice. It should return the factor by which branches should be reduced over the plain expansion with one comparison per MODE-sized piece. A port can also prevent a particular mode from being used for block comparisons by returning a negative number from this hook. -- Macro: MOVE_MAX_PIECES A C expression used by ‘move_by_pieces’ to determine the largest unit a load or store used to copy memory is. Defaults to ‘MOVE_MAX’. -- Macro: STORE_MAX_PIECES A C expression used by ‘store_by_pieces’ to determine the largest unit a store used to memory is. Defaults to ‘MOVE_MAX_PIECES’, or two times the size of ‘HOST_WIDE_INT’, whichever is smaller. -- Macro: COMPARE_MAX_PIECES A C expression used by ‘compare_by_pieces’ to determine the largest unit a load or store used to compare memory is. Defaults to ‘MOVE_MAX_PIECES’. -- Macro: CLEAR_RATIO (SPEED) The threshold of number of scalar move insns, _below_ which a sequence of insns should be generated to clear memory instead of a string clear insn or a library call. Increasing the value will always make code faster, but eventually incurs high cost in increased code size. The parameter SPEED is true if the code is currently being optimized for speed rather than size. If you don't define this, a reasonable default is used. -- Macro: SET_RATIO (SPEED) The threshold of number of scalar move insns, _below_ which a sequence of insns should be generated to set memory to a constant value, instead of a block set insn or a library call. Increasing the value will always make code faster, but eventually incurs high cost in increased code size. The parameter SPEED is true if the code is currently being optimized for speed rather than size. If you don't define this, it defaults to the value of ‘MOVE_RATIO’. -- Macro: USE_LOAD_POST_INCREMENT (MODE) A C expression used to determine whether a load postincrement is a good thing to use for a given mode. Defaults to the value of ‘HAVE_POST_INCREMENT’. -- Macro: USE_LOAD_POST_DECREMENT (MODE) A C expression used to determine whether a load postdecrement is a good thing to use for a given mode. Defaults to the value of ‘HAVE_POST_DECREMENT’. -- Macro: USE_LOAD_PRE_INCREMENT (MODE) A C expression used to determine whether a load preincrement is a good thing to use for a given mode. Defaults to the value of ‘HAVE_PRE_INCREMENT’. -- Macro: USE_LOAD_PRE_DECREMENT (MODE) A C expression used to determine whether a load predecrement is a good thing to use for a given mode. Defaults to the value of ‘HAVE_PRE_DECREMENT’. -- Macro: USE_STORE_POST_INCREMENT (MODE) A C expression used to determine whether a store postincrement is a good thing to use for a given mode. Defaults to the value of ‘HAVE_POST_INCREMENT’. -- Macro: USE_STORE_POST_DECREMENT (MODE) A C expression used to determine whether a store postdecrement is a good thing to use for a given mode. Defaults to the value of ‘HAVE_POST_DECREMENT’. -- Macro: USE_STORE_PRE_INCREMENT (MODE) This macro is used to determine whether a store preincrement is a good thing to use for a given mode. Defaults to the value of ‘HAVE_PRE_INCREMENT’. -- Macro: USE_STORE_PRE_DECREMENT (MODE) This macro is used to determine whether a store predecrement is a good thing to use for a given mode. Defaults to the value of ‘HAVE_PRE_DECREMENT’. -- Macro: NO_FUNCTION_CSE Define this macro to be true if it is as good or better to call a constant function address than to call an address kept in a register. -- Macro: LOGICAL_OP_NON_SHORT_CIRCUIT Define this macro if a non-short-circuit operation produced by ‘fold_range_test ()’ is optimal. This macro defaults to true if ‘BRANCH_COST’ is greater than or equal to the value 2. -- Target Hook: bool TARGET_OPTAB_SUPPORTED_P (int OP, machine_mode MODE1, machine_mode MODE2, optimization_type OPT_TYPE) Return true if the optimizers should use optab OP with modes MODE1 and MODE2 for optimization type OPT_TYPE. The optab is known to have an associated ‘.md’ instruction whose C condition is true. MODE2 is only meaningful for conversion optabs; for direct optabs it is a copy of MODE1. For example, when called with OP equal to ‘rint_optab’ and MODE1 equal to ‘DFmode’, the hook should say whether the optimizers should use optab ‘rintdf2’. The default hook returns true for all inputs. -- Target Hook: bool TARGET_RTX_COSTS (rtx X, machine_mode MODE, int OUTER_CODE, int OPNO, int *TOTAL, bool SPEED) This target hook describes the relative costs of RTL expressions. The cost may depend on the precise form of the expression, which is available for examination in X, and the fact that X appears as operand OPNO of an expression with rtx code OUTER_CODE. That is, the hook can assume that there is some rtx Y such that ‘GET_CODE (Y) == OUTER_CODE’ and such that either (a) ‘XEXP (Y, OPNO) == X’ or (b) ‘XVEC (Y, OPNO)’ contains X. MODE is X's machine mode, or for cases like ‘const_int’ that do not have a mode, the mode in which X is used. In implementing this hook, you can use the construct ‘COSTS_N_INSNS (N)’ to specify a cost equal to N fast instructions. On entry to the hook, ‘*TOTAL’ contains a default estimate for the cost of the expression. The hook should modify this value as necessary. Traditionally, the default costs are ‘COSTS_N_INSNS (5)’ for multiplications, ‘COSTS_N_INSNS (7)’ for division and modulus operations, and ‘COSTS_N_INSNS (1)’ for all other operations. When optimizing for code size, i.e. when ‘speed’ is false, this target hook should be used to estimate the relative size cost of an expression, again relative to ‘COSTS_N_INSNS’. The hook returns true when all subexpressions of X have been processed, and false when ‘rtx_cost’ should recurse. -- Target Hook: int TARGET_ADDRESS_COST (rtx ADDRESS, machine_mode MODE, addr_space_t AS, bool SPEED) This hook computes the cost of an addressing mode that contains ADDRESS. If not defined, the cost is computed from the ADDRESS expression and the ‘TARGET_RTX_COST’ hook. For most CISC machines, the default cost is a good approximation of the true cost of the addressing mode. However, on RISC machines, all instructions normally have the same length and execution time. Hence all addresses will have equal costs. In cases where more than one form of an address is known, the form with the lowest cost will be used. If multiple forms have the same, lowest, cost, the one that is the most complex will be used. For example, suppose an address that is equal to the sum of a register and a constant is used twice in the same basic block. When this macro is not defined, the address will be computed in a register and memory references will be indirect through that register. On machines where the cost of the addressing mode containing the sum is no higher than that of a simple indirect reference, this will produce an additional instruction and possibly require an additional register. Proper specification of this macro eliminates this overhead for such machines. This hook is never called with an invalid address. On machines where an address involving more than one register is as cheap as an address computation involving only one register, defining ‘TARGET_ADDRESS_COST’ to reflect this can cause two registers to be live over a region of code where only one would have been if ‘TARGET_ADDRESS_COST’ were not defined in that manner. This effect should be considered in the definition of this macro. Equivalent costs should probably only be given to addresses with different numbers of registers on machines with lots of registers. -- Target Hook: int TARGET_INSN_COST (rtx_insn *INSN, bool SPEED) This target hook describes the relative costs of RTL instructions. In implementing this hook, you can use the construct ‘COSTS_N_INSNS (N)’ to specify a cost equal to N fast instructions. When optimizing for code size, i.e. when ‘speed’ is false, this target hook should be used to estimate the relative size cost of an expression, again relative to ‘COSTS_N_INSNS’. -- Target Hook: unsigned int TARGET_MAX_NOCE_IFCVT_SEQ_COST (edge E) This hook returns a value in the same units as ‘TARGET_RTX_COSTS’, giving the maximum acceptable cost for a sequence generated by the RTL if-conversion pass when conditional execution is not available. The RTL if-conversion pass attempts to convert conditional operations that would require a branch to a series of unconditional operations and ‘movMODEcc’ insns. This hook returns the maximum cost of the unconditional instructions and the ‘movMODEcc’ insns. RTL if-conversion is cancelled if the cost of the converted sequence is greater than the value returned by this hook. ‘e’ is the edge between the basic block containing the conditional branch to the basic block which would be executed if the condition were true. The default implementation of this hook uses the ‘max-rtl-if-conversion-[un]predictable’ parameters if they are set, and uses a multiple of ‘BRANCH_COST’ otherwise. -- Target Hook: bool TARGET_NOCE_CONVERSION_PROFITABLE_P (rtx_insn *SEQ, struct noce_if_info *IF_INFO) This hook returns true if the instruction sequence ‘seq’ is a good candidate as a replacement for the if-convertible sequence described in ‘if_info’. -- Target Hook: bool TARGET_NEW_ADDRESS_PROFITABLE_P (rtx MEMREF, rtx_insn * INSN, rtx NEW_ADDR) Return ‘true’ if it is profitable to replace the address in MEMREF with NEW_ADDR. This allows targets to prevent the scheduler from undoing address optimizations. The instruction containing the memref is INSN. The default implementation returns ‘true’. -- Target Hook: bool TARGET_NO_SPECULATION_IN_DELAY_SLOTS_P (void) This predicate controls the use of the eager delay slot filler to disallow speculatively executed instructions being placed in delay slots. Targets such as certain MIPS architectures possess both branches with and without delay slots. As the eager delay slot filler can decrease performance, disabling it is beneficial when ordinary branches are available. Use of delay slot branches filled using the basic filler is often still desirable as the delay slot can hide a pipeline bubble. -- Target Hook: HOST_WIDE_INT TARGET_ESTIMATED_POLY_VALUE (poly_int64 VAL, poly_value_estimate_kind KIND) Return an estimate of the runtime value of VAL, for use in things like cost calculations or profiling frequencies. KIND is used to ask for the minimum, maximum, and likely estimates of the value through the ‘POLY_VALUE_MIN’, ‘POLY_VALUE_MAX’ and ‘POLY_VALUE_LIKELY’ values. The default implementation returns the lowest possible value of VAL.  File: gccint.info, Node: Scheduling, Next: Sections, Prev: Costs, Up: Target Macros 18.17 Adjusting the Instruction Scheduler ========================================= The instruction scheduler may need a fair amount of machine-specific adjustment in order to produce good code. GCC provides several target hooks for this purpose. It is usually enough to define just a few of them: try the first ones in this list first. -- Target Hook: int TARGET_SCHED_ISSUE_RATE (void) This hook returns the maximum number of instructions that can ever issue at the same time on the target machine. The default is one. Although the insn scheduler can define itself the possibility of issue an insn on the same cycle, the value can serve as an additional constraint to issue insns on the same simulated processor cycle (see hooks ‘TARGET_SCHED_REORDER’ and ‘TARGET_SCHED_REORDER2’). This value must be constant over the entire compilation. If you need it to vary depending on what the instructions are, you must use ‘TARGET_SCHED_VARIABLE_ISSUE’. -- Target Hook: int TARGET_SCHED_VARIABLE_ISSUE (FILE *FILE, int VERBOSE, rtx_insn *INSN, int MORE) This hook is executed by the scheduler after it has scheduled an insn from the ready list. It should return the number of insns which can still be issued in the current cycle. The default is ‘MORE - 1’ for insns other than ‘CLOBBER’ and ‘USE’, which normally are not counted against the issue rate. You should define this hook if some insns take more machine resources than others, so that fewer insns can follow them in the same cycle. FILE is either a null pointer, or a stdio stream to write any debug output to. VERBOSE is the verbose level provided by ‘-fsched-verbose-N’. INSN is the instruction that was scheduled. -- Target Hook: int TARGET_SCHED_ADJUST_COST (rtx_insn *INSN, int DEP_TYPE1, rtx_insn *DEP_INSN, int COST, unsigned int DW) This function corrects the value of COST based on the relationship between INSN and DEP_INSN through a dependence of type dep_type, and strength DW. It should return the new value. The default is to make no adjustment to COST. This can be used for example to specify to the scheduler using the traditional pipeline description that an output- or anti-dependence does not incur the same cost as a data-dependence. If the scheduler using the automaton based pipeline description, the cost of anti-dependence is zero and the cost of output-dependence is maximum of one and the difference of latency times of the first and the second insns. If these values are not acceptable, you could use the hook to modify them too. See also *note Processor pipeline description::. -- Target Hook: int TARGET_SCHED_ADJUST_PRIORITY (rtx_insn *INSN, int PRIORITY) This hook adjusts the integer scheduling priority PRIORITY of INSN. It should return the new priority. Increase the priority to execute INSN earlier, reduce the priority to execute INSN later. Do not define this hook if you do not need to adjust the scheduling priorities of insns. -- Target Hook: int TARGET_SCHED_REORDER (FILE *FILE, int VERBOSE, rtx_insn **READY, int *N_READYP, int CLOCK) This hook is executed by the scheduler after it has scheduled the ready list, to allow the machine description to reorder it (for example to combine two small instructions together on ‘VLIW’ machines). FILE is either a null pointer, or a stdio stream to write any debug output to. VERBOSE is the verbose level provided by ‘-fsched-verbose-N’. READY is a pointer to the ready list of instructions that are ready to be scheduled. N_READYP is a pointer to the number of elements in the ready list. The scheduler reads the ready list in reverse order, starting with READY[*N_READYP − 1] and going to READY[0]. CLOCK is the timer tick of the scheduler. You may modify the ready list and the number of ready insns. The return value is the number of insns that can issue this cycle; normally this is just ‘issue_rate’. See also ‘TARGET_SCHED_REORDER2’. -- Target Hook: int TARGET_SCHED_REORDER2 (FILE *FILE, int VERBOSE, rtx_insn **READY, int *N_READYP, int CLOCK) Like ‘TARGET_SCHED_REORDER’, but called at a different time. That function is called whenever the scheduler starts a new cycle. This one is called once per iteration over a cycle, immediately after ‘TARGET_SCHED_VARIABLE_ISSUE’; it can reorder the ready list and return the number of insns to be scheduled in the same cycle. Defining this hook can be useful if there are frequent situations where scheduling one insn causes other insns to become ready in the same cycle. These other insns can then be taken into account properly. -- Target Hook: bool TARGET_SCHED_MACRO_FUSION_P (void) This hook is used to check whether target platform supports macro fusion. -- Target Hook: bool TARGET_SCHED_MACRO_FUSION_PAIR_P (rtx_insn *PREV, rtx_insn *CURR) This hook is used to check whether two insns should be macro fused for a target microarchitecture. If this hook returns true for the given insn pair (PREV and CURR), the scheduler will put them into a sched group, and they will not be scheduled apart. The two insns will be either two SET insns or a compare and a conditional jump and this hook should validate any dependencies needed to fuse the two insns together. -- Target Hook: void TARGET_SCHED_DEPENDENCIES_EVALUATION_HOOK (rtx_insn *HEAD, rtx_insn *TAIL) This hook is called after evaluation forward dependencies of insns in chain given by two parameter values (HEAD and TAIL correspondingly) but before insns scheduling of the insn chain. For example, it can be used for better insn classification if it requires analysis of dependencies. This hook can use backward and forward dependencies of the insn scheduler because they are already calculated. -- Target Hook: void TARGET_SCHED_INIT (FILE *FILE, int VERBOSE, int MAX_READY) This hook is executed by the scheduler at the beginning of each block of instructions that are to be scheduled. FILE is either a null pointer, or a stdio stream to write any debug output to. VERBOSE is the verbose level provided by ‘-fsched-verbose-N’. MAX_READY is the maximum number of insns in the current scheduling region that can be live at the same time. This can be used to allocate scratch space if it is needed, e.g. by ‘TARGET_SCHED_REORDER’. -- Target Hook: void TARGET_SCHED_FINISH (FILE *FILE, int VERBOSE) This hook is executed by the scheduler at the end of each block of instructions that are to be scheduled. It can be used to perform cleanup of any actions done by the other scheduling hooks. FILE is either a null pointer, or a stdio stream to write any debug output to. VERBOSE is the verbose level provided by ‘-fsched-verbose-N’. -- Target Hook: void TARGET_SCHED_INIT_GLOBAL (FILE *FILE, int VERBOSE, int OLD_MAX_UID) This hook is executed by the scheduler after function level initializations. FILE is either a null pointer, or a stdio stream to write any debug output to. VERBOSE is the verbose level provided by ‘-fsched-verbose-N’. OLD_MAX_UID is the maximum insn uid when scheduling begins. -- Target Hook: void TARGET_SCHED_FINISH_GLOBAL (FILE *FILE, int VERBOSE) This is the cleanup hook corresponding to ‘TARGET_SCHED_INIT_GLOBAL’. FILE is either a null pointer, or a stdio stream to write any debug output to. VERBOSE is the verbose level provided by ‘-fsched-verbose-N’. -- Target Hook: rtx TARGET_SCHED_DFA_PRE_CYCLE_INSN (void) The hook returns an RTL insn. The automaton state used in the pipeline hazard recognizer is changed as if the insn were scheduled when the new simulated processor cycle starts. Usage of the hook may simplify the automaton pipeline description for some VLIW processors. If the hook is defined, it is used only for the automaton based pipeline description. The default is not to change the state when the new simulated processor cycle starts. -- Target Hook: void TARGET_SCHED_INIT_DFA_PRE_CYCLE_INSN (void) The hook can be used to initialize data used by the previous hook. -- Target Hook: rtx_insn * TARGET_SCHED_DFA_POST_CYCLE_INSN (void) The hook is analogous to ‘TARGET_SCHED_DFA_PRE_CYCLE_INSN’ but used to changed the state as if the insn were scheduled when the new simulated processor cycle finishes. -- Target Hook: void TARGET_SCHED_INIT_DFA_POST_CYCLE_INSN (void) The hook is analogous to ‘TARGET_SCHED_INIT_DFA_PRE_CYCLE_INSN’ but used to initialize data used by the previous hook. -- Target Hook: void TARGET_SCHED_DFA_PRE_ADVANCE_CYCLE (void) The hook to notify target that the current simulated cycle is about to finish. The hook is analogous to ‘TARGET_SCHED_DFA_PRE_CYCLE_INSN’ but used to change the state in more complicated situations - e.g., when advancing state on a single insn is not enough. -- Target Hook: void TARGET_SCHED_DFA_POST_ADVANCE_CYCLE (void) The hook to notify target that new simulated cycle has just started. The hook is analogous to ‘TARGET_SCHED_DFA_POST_CYCLE_INSN’ but used to change the state in more complicated situations - e.g., when advancing state on a single insn is not enough. -- Target Hook: int TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD (void) This hook controls better choosing an insn from the ready insn queue for the DFA-based insn scheduler. Usually the scheduler chooses the first insn from the queue. If the hook returns a positive value, an additional scheduler code tries all permutations of ‘TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD ()’ subsequent ready insns to choose an insn whose issue will result in maximal number of issued insns on the same cycle. For the VLIW processor, the code could actually solve the problem of packing simple insns into the VLIW insn. Of course, if the rules of VLIW packing are described in the automaton. This code also could be used for superscalar RISC processors. Let us consider a superscalar RISC processor with 3 pipelines. Some insns can be executed in pipelines A or B, some insns can be executed only in pipelines B or C, and one insn can be executed in pipeline B. The processor may issue the 1st insn into A and the 2nd one into B. In this case, the 3rd insn will wait for freeing B until the next cycle. If the scheduler issues the 3rd insn the first, the processor could issue all 3 insns per cycle. Actually this code demonstrates advantages of the automaton based pipeline hazard recognizer. We try quickly and easy many insn schedules to choose the best one. The default is no multipass scheduling. -- Target Hook: int TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD (rtx_insn *INSN, int READY_INDEX) This hook controls what insns from the ready insn queue will be considered for the multipass insn scheduling. If the hook returns zero for INSN, the insn will be considered in multipass scheduling. Positive return values will remove INSN from consideration on the current round of multipass scheduling. Negative return values will remove INSN from consideration for given number of cycles. Backends should be careful about returning non-zero for highest priority instruction at position 0 in the ready list. READY_INDEX is passed to allow backends make correct judgements. The default is that any ready insns can be chosen to be issued. -- Target Hook: void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_BEGIN (void *DATA, signed char *READY_TRY, int N_READY, bool FIRST_CYCLE_INSN_P) This hook prepares the target backend for a new round of multipass scheduling. -- Target Hook: void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_ISSUE (void *DATA, signed char *READY_TRY, int N_READY, rtx_insn *INSN, const void *PREV_DATA) This hook is called when multipass scheduling evaluates instruction INSN. -- Target Hook: void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_BACKTRACK (const void *DATA, signed char *READY_TRY, int N_READY) This is called when multipass scheduling backtracks from evaluation of an instruction. -- Target Hook: void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_END (const void *DATA) This hook notifies the target about the result of the concluded current round of multipass scheduling. -- Target Hook: void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_INIT (void *DATA) This hook initializes target-specific data used in multipass scheduling. -- Target Hook: void TARGET_SCHED_FIRST_CYCLE_MULTIPASS_FINI (void *DATA) This hook finalizes target-specific data used in multipass scheduling. -- Target Hook: int TARGET_SCHED_DFA_NEW_CYCLE (FILE *DUMP, int VERBOSE, rtx_insn *INSN, int LAST_CLOCK, int CLOCK, int *SORT_P) This hook is called by the insn scheduler before issuing INSN on cycle CLOCK. If the hook returns nonzero, INSN is not issued on this processor cycle. Instead, the processor cycle is advanced. If *SORT_P is zero, the insn ready queue is not sorted on the new cycle start as usually. DUMP and VERBOSE specify the file and verbosity level to use for debugging output. LAST_CLOCK and CLOCK are, respectively, the processor cycle on which the previous insn has been issued, and the current processor cycle. -- Target Hook: bool TARGET_SCHED_IS_COSTLY_DEPENDENCE (struct _dep *_DEP, int COST, int DISTANCE) This hook is used to define which dependences are considered costly by the target, so costly that it is not advisable to schedule the insns that are involved in the dependence too close to one another. The parameters to this hook are as follows: The first parameter _DEP is the dependence being evaluated. The second parameter COST is the cost of the dependence as estimated by the scheduler, and the third parameter DISTANCE is the distance in cycles between the two insns. The hook returns ‘true’ if considering the distance between the two insns the dependence between them is considered costly by the target, and ‘false’ otherwise. Defining this hook can be useful in multiple-issue out-of-order machines, where (a) it's practically hopeless to predict the actual data/resource delays, however: (b) there's a better chance to predict the actual grouping that will be formed, and (c) correctly emulating the grouping can be very important. In such targets one may want to allow issuing dependent insns closer to one another--i.e., closer than the dependence distance; however, not in cases of "costly dependences", which this hooks allows to define. -- Target Hook: void TARGET_SCHED_H_I_D_EXTENDED (void) This hook is called by the insn scheduler after emitting a new instruction to the instruction stream. The hook notifies a target backend to extend its per instruction data structures. -- Target Hook: void * TARGET_SCHED_ALLOC_SCHED_CONTEXT (void) Return a pointer to a store large enough to hold target scheduling context. -- Target Hook: void TARGET_SCHED_INIT_SCHED_CONTEXT (void *TC, bool CLEAN_P) Initialize store pointed to by TC to hold target scheduling context. It CLEAN_P is true then initialize TC as if scheduler is at the beginning of the block. Otherwise, copy the current context into TC. -- Target Hook: void TARGET_SCHED_SET_SCHED_CONTEXT (void *TC) Copy target scheduling context pointed to by TC to the current context. -- Target Hook: void TARGET_SCHED_CLEAR_SCHED_CONTEXT (void *TC) Deallocate internal data in target scheduling context pointed to by TC. -- Target Hook: void TARGET_SCHED_FREE_SCHED_CONTEXT (void *TC) Deallocate a store for target scheduling context pointed to by TC. -- Target Hook: int TARGET_SCHED_SPECULATE_INSN (rtx_insn *INSN, unsigned int DEP_STATUS, rtx *NEW_PAT) This hook is called by the insn scheduler when INSN has only speculative dependencies and therefore can be scheduled speculatively. The hook is used to check if the pattern of INSN has a speculative version and, in case of successful check, to generate that speculative pattern. The hook should return 1, if the instruction has a speculative form, or −1, if it doesn't. REQUEST describes the type of requested speculation. If the return value equals 1 then NEW_PAT is assigned the generated speculative pattern. -- Target Hook: bool TARGET_SCHED_NEEDS_BLOCK_P (unsigned int DEP_STATUS) This hook is called by the insn scheduler during generation of recovery code for INSN. It should return ‘true’, if the corresponding check instruction should branch to recovery code, or ‘false’ otherwise. -- Target Hook: rtx TARGET_SCHED_GEN_SPEC_CHECK (rtx_insn *INSN, rtx_insn *LABEL, unsigned int DS) This hook is called by the insn scheduler to generate a pattern for recovery check instruction. If MUTATE_P is zero, then INSN is a speculative instruction for which the check should be generated. LABEL is either a label of a basic block, where recovery code should be emitted, or a null pointer, when requested check doesn't branch to recovery code (a simple check). If MUTATE_P is nonzero, then a pattern for a branchy check corresponding to a simple check denoted by INSN should be generated. In this case LABEL can't be null. -- Target Hook: void TARGET_SCHED_SET_SCHED_FLAGS (struct spec_info_def *SPEC_INFO) This hook is used by the insn scheduler to find out what features should be enabled/used. The structure *SPEC_INFO should be filled in by the target. The structure describes speculation types that can be used in the scheduler. -- Target Hook: bool TARGET_SCHED_CAN_SPECULATE_INSN (rtx_insn *INSN) Some instructions should never be speculated by the schedulers, usually because the instruction is too expensive to get this wrong. Often such instructions have long latency, and often they are not fully modeled in the pipeline descriptions. This hook should return ‘false’ if INSN should not be speculated. -- Target Hook: int TARGET_SCHED_SMS_RES_MII (struct ddg *G) This hook is called by the swing modulo scheduler to calculate a resource-based lower bound which is based on the resources available in the machine and the resources required by each instruction. The target backend can use G to calculate such bound. A very simple lower bound will be used in case this hook is not implemented: the total number of instructions divided by the issue rate. -- Target Hook: bool TARGET_SCHED_DISPATCH (rtx_insn *INSN, int X) This hook is called by Haifa Scheduler. It returns true if dispatch scheduling is supported in hardware and the condition specified in the parameter is true. -- Target Hook: void TARGET_SCHED_DISPATCH_DO (rtx_insn *INSN, int X) This hook is called by Haifa Scheduler. It performs the operation specified in its second parameter. -- Target Hook: bool TARGET_SCHED_EXPOSED_PIPELINE True if the processor has an exposed pipeline, which means that not just the order of instructions is important for correctness when scheduling, but also the latencies of operations. -- Target Hook: int TARGET_SCHED_REASSOCIATION_WIDTH (unsigned int OPC, machine_mode MODE) This hook is called by tree reassociator to determine a level of parallelism required in output calculations chain. -- Target Hook: void TARGET_SCHED_FUSION_PRIORITY (rtx_insn *INSN, int MAX_PRI, int *FUSION_PRI, int *PRI) This hook is called by scheduling fusion pass. It calculates fusion priorities for each instruction passed in by parameter. The priorities are returned via pointer parameters. INSN is the instruction whose priorities need to be calculated. MAX_PRI is the maximum priority can be returned in any cases. FUSION_PRI is the pointer parameter through which INSN's fusion priority should be calculated and returned. PRI is the pointer parameter through which INSN's priority should be calculated and returned. Same FUSION_PRI should be returned for instructions which should be scheduled together. Different PRI should be returned for instructions with same FUSION_PRI. FUSION_PRI is the major sort key, PRI is the minor sort key. All instructions will be scheduled according to the two priorities. All priorities calculated should be between 0 (exclusive) and MAX_PRI (inclusive). To avoid false dependencies, FUSION_PRI of instructions which need to be scheduled together should be smaller than FUSION_PRI of irrelevant instructions. Given below example: ldr r10, [r1, 4] add r4, r4, r10 ldr r15, [r2, 8] sub r5, r5, r15 ldr r11, [r1, 0] add r4, r4, r11 ldr r16, [r2, 12] sub r5, r5, r16 On targets like ARM/AArch64, the two pairs of consecutive loads should be merged. Since peephole2 pass can't help in this case unless consecutive loads are actually next to each other in instruction flow. That's where this scheduling fusion pass works. This hook calculates priority for each instruction based on its fustion type, like: ldr r10, [r1, 4] ; fusion_pri=99, pri=96 add r4, r4, r10 ; fusion_pri=100, pri=100 ldr r15, [r2, 8] ; fusion_pri=98, pri=92 sub r5, r5, r15 ; fusion_pri=100, pri=100 ldr r11, [r1, 0] ; fusion_pri=99, pri=100 add r4, r4, r11 ; fusion_pri=100, pri=100 ldr r16, [r2, 12] ; fusion_pri=98, pri=88 sub r5, r5, r16 ; fusion_pri=100, pri=100 Scheduling fusion pass then sorts all ready to issue instructions according to the priorities. As a result, instructions of same fusion type will be pushed together in instruction flow, like: ldr r11, [r1, 0] ldr r10, [r1, 4] ldr r15, [r2, 8] ldr r16, [r2, 12] add r4, r4, r10 sub r5, r5, r15 add r4, r4, r11 sub r5, r5, r16 Now peephole2 pass can simply merge the two pairs of loads. Since scheduling fusion pass relies on peephole2 to do real fusion work, it is only enabled by default when peephole2 is in effect. This is firstly introduced on ARM/AArch64 targets, please refer to the hook implementation for how different fusion types are supported. -- Target Hook: void TARGET_EXPAND_DIVMOD_LIBFUNC (rtx LIBFUNC, machine_mode MODE, rtx OP0, rtx OP1, rtx *QUOT, rtx *REM) Define this hook for enabling divmod transform if the port does not have hardware divmod insn but defines target-specific divmod libfuncs.